(Back to Session Schedule)

The 14th Asia and South Pacific Design Automation Conference

Session 4C  Signal/Power Integrity and Simulation
Time: 10:15 - 12:20 Wednesday, January 21, 2009
Location: Room 414+415
Chairs: Hideki Asai (Shizuoka Univ., Japan), Sheldon Tan (Univ. of California, Riverside, United States)

4C-1 (Time: 10:15 - 10:40)
TitleStochastic Current Prediction Enabled Frequency Actuator for Runtime Resonance Noise Reduction
Author*Yiyu Shi (Univ. of California, Los Angeles, United States), Jinjun Xiong, Howard Chen (IBM, United States), Lei He (Univ. of California, Los Angeles, United States)
Pagepp. 373 - 378
Detailed information (abstract, keywords, etc)

4C-2 (Time: 10:40 - 11:05)
TitleFast Analysis of Nontree-Clock Network Considering Environmental Uncertainty by Parameterized and Incremental Macromodeling
AuthorHai Wang (Univ. of California, Riverside, United States), Hao Yu (Berkeley Design Automation, United States), *Sheldon X.D. Tan (Univ. of California, Riverside, United States)
Pagepp. 379 - 384
Detailed information (abstract, keywords, etc)

4C-3 (Time: 11:05 - 11:30)
TitleHigh Performance On-Chip Differential Signaling Using Passive Compensation for Global Communication
AuthorLing Zhang, Yulei Zhang (Univ. of California, San Diego, United States), Akira Tsuchiya (Kyoto Univ., Japan), Masanori Hashimoto (Osaka Univ., Japan), Ernest Kuh (Univ. of California, Berkeley, United States), *Chung-Kuan Cheng (Univ. of California, San Diego, United States)
Pagepp. 385 - 390
Detailed information (abstract, keywords, etc)

4C-4 (Time: 11:30 - 11:55)
TitleNoise Minimization During Power-Up Stage for a Multi-Domain Power Network
Author*Wanping Zhang (Qualcomm Inc./Univ. of California, San Diego, United States), Yi Zhu (Univ. of California, San Diego, United States), Wenjian Yu (Tsinghua Univ., China), Amirali Shayan, Renshen Wang (Univ. of California, San Diego, United States), Zhi Zhu (Qualcomm Inc., United States), Chung-Kuan Cheng (Univ. of California, San Diego, United States)
Pagepp. 391 - 396
Detailed information (abstract, keywords, etc)

4C-5s (Time: 11:55 - 12:07)
TitleParallel Transistor Level Circuit Simulation using Domain Decomposition Methods
Author*He Peng, Chung-Kuan Cheng (Univ. of California, San Diego, United States)
Pagepp. 397 - 402
Detailed information (abstract, keywords, etc)

4C-6s (Time: 12:07 - 12:19)
TitleFast Circuit Simulation on Graphics Processing Units
AuthorKanupriya Gulati (Texas A&M Univ., United States), John F. Croix (Nascentric, Inc., United States), *Sunil P. Khatri (Texas A&M Univ., United States), Rahm Shastry (Nascentric, Inc., United States)
Pagepp. 403 - 408
Detailed information (abstract, keywords, etc)
Slides