| Title | Scan-Based Attack against Elliptic Curve Cryptosystems |
| Author | *Ryuta Nara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ., Japan) |
| Page | pp. 407 - 412 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Secure and Testable Scan Design Using Extended de Bruijn Graphs |
| Author | Hideo Fujiwara, *Marie Engelene J. Obien (NAIST, Japan) |
| Page | pp. 413 - 418 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Correlating System Test Fmax with Structural Test Fmax and Process Monitoring Measurements |
| Author | *Chia-Ying (Janine) Chen (Univ. of California, Santa Barbara, U.S.A.), Jing Zeng (Advanced Micro Devices, Inc, U.S.A.), Li-C. Wang (Univ. of California, Santa Barbara, U.S.A.), Michael Mateja (Advanced Micro Devices, Inc, U.S.A.) |
| Page | pp. 419 - 424 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Guided Gate-level ATPG for Sequential Circuits using a High-level Test Generation Approach |
| Author | *Bijan Alizadeh, Masahiro Fujita (Univ. of Tokyo, Japan) |
| Page | pp. 425 - 430 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |