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The 15th Asia and South Pacific Design Automation Conference

Session 7A  Modern Floorplanning and Placement Techniques
Time: 8:30 - 10:10 Thursday, January 21, 2010
Location: Room 101A
Chairs: David Pan (The University of Texas at Austin, U.S.A.), Hung-Ming Chen (National Chiao Tung University, Taiwan)

7A-1 (Time: 8:30 - 8:55)
TitleConfigurable Multi-product Floorplanning
AuthorQiang Ma, *Martin D. F. Wong (University of Illinois at Urbana-Champaign, U.S.A.), Kai-Yuan Chao (Intel Corporation, U.S.A.)
Pagepp. 549 - 554
KeywordFloorplanning, Multi-product
AbstractThe reuse of existing design at different function levels can provide shorter time-to-market thus becomes an industrial trend. However, the SoC design floorplan with IP reuse usually targets for one single product; and, high design re-convergence efforts for other different products are still required. Therefore, the problem of designing a floorplan that simultaneously optimizes multiple products, or Multiproduct Floorplanning, is introduced. To the best of our knowledge, this is the first work in literature that addresses this newly emerged problem. The effectiveness of our approach is validated by promising results on several data sets derived from industrial test cases.
Slides

7A-2 (Time: 8:55 - 9:20)
TitleUFO: Unified Convex Optimization Algorithms for Fixed-Outline Floorplanning
Author*Jai-Ming Lin, Hsi Hung (National Cheng Kung University, Taiwan)
Pagepp. 555 - 560
Keywordfloorplan, convex, fixed-outline
AbstractIn this paper, we apply two convex optimization methods, named UFO, for fixed-outline floorplanning. Our approach consists of two stages which are a global distribution stage and a local legalization stage. In the first stage, we first model modules as circles and use a pull-push model to distribute modules over a fixed outline under the wirelength consideration. Because good results can be obtained after the first stage, we do not need to consider wirelegnth and devote to legalize modules in the second stage. To keep the good results of the first stage, we also propose a procedure to extract the geometrical relations of modules from a layout and record them by constraint graphs in the second stage. Then, a quadratic function as well as non-overlap and boundary constraints are used to determine the locations and shapes of modules. We have implemented the two convex functions on Matlab, and experimental results have demonstrated that UFO clearly outperforms the results reported in the literature on the GSRC benchmark.
Slides

7A-3 (Time: 9:20 - 9:45)
TitleFixed-outline Thermal-aware 3D Floorplanning
Author*Linfu Xiao (The Chinese University of Hong Kong, Hong Kong), Subarna Sinha (Synopsys, U.S.A.), Jingyu Xu (Synopsys, China), Evangeline F.Y. Young (The Chinese University of Hong Kong, Hong Kong)
Pagepp. 561 - 567
Keyword3D IC, floorplan, thermal, fixed outline
AbstractIn this paper, we present a novel algorithm for 3D floorplanning with fixed outline constraints and a particular emphasis on thermal awareness. A computationally efficient thermal model that can be used to guide the thermal-aware floorplanning algorithm to reduce the peak temperature is proposed. We also present a novel white space redistribution algorithm to dissipate hotspot. Thermal through-silicon via (TSV) insertion is performed during the floorplanning process as a means to control the peak temperature. Experimental results are very promising and demonstrate that the proposed floorplanning algorithm has a high success rate at meeting the fixed-outline constraints while effectively limiting the rise in peak temperature.
Slides

7A-4 (Time: 9:45 - 10:10)
TitleA Hierarchical Bin-Based Legalizer for Standard-Cell Designs with Minimal Disturbance
AuthorYu-Min Lee, *Tsung-You Wu, Po-Yi Chiang (National Chiao Tung University, Taiwan)
Pagepp. 568 - 573
Keywordlegalization, hierarchical method, bin-based technique
AbstractIn this work, a hierarchical bin-based legalization approach, HiBinLegalizer, is developed to legalize standard cells with minimal movement. First, a chip is divided into several bins with equal size. Then, starting with the most crowed unlegalized bin, a merging procedure for bins is used to integrate bins into a cross-shape region or a square-shape region until the cell density in that region is less than a specific cell-density-threshold. After that, an efficient legalization method which simultaneously preserves the cell orders in each row and minimizes the weighted sum of movement distances is developed to legalize cells in that region to limit the movable scope. To improve the legalization quality, HiBinLegalizer refreshes the positions of legalized cells during legalization. The legalizing procedure is repeated until all cells are non-overlapped. Compared with the state-of-the-art method, Abacus, HiBinLegalizer can reduce the total movement of cells to be 48% in average and save the largest movement of cells to be 140% in average. Moreover, HiBinLegalizer can reduce the HPWL by 47% and obtain average 1.11 times runtime speed up.
Slides