| Title | A Case for Wireless 3D NoCs for CMPs |
| Author | *Hiroki Matsutani (Keio University, Japan), Paul Bogdan, Radu Marculescu (Carnegie Mellon University, U.S.A.), Yasuhiro Take, Daisuke Sasaki, Hao Zhang (Keio University, Japan), Michihiro Koibuchi (National Institute of Informatics, Japan), Tadahiro Kuroda, Hideharu Amano (Keio University, Japan) |
| Page | pp. 23 - 28 |
| Keyword | Network-on-Chip (NoC), 3-D NoC, irregular topology |
| Abstract | Inductive-coupling is yet another 3D integration technique that can be used to stack more than three known-good-dies in a SiP without wire connections. We present a topology-agnostic 3D CMP architecture using inductive-coupling that offers great flexibility in customizing the number of processor chips, SRAM chips, and DRAM chips in a SiP after chips have been fabricated. In this paper, first, we propose a routing protocol that exchanges the network information between all chips in a given SiP to establish efficient deadlock-free routing paths. Second, we propose its optimization technique that analyzes the application traffic patterns and selects different spanning tree roots so as to minimize the average hop counts and improve the application performance. |
| Title | Deflection Routing in 3D Network-on-Chip with TSV Serialization |
| Author | *Jinho Lee, Dongwoo Lee, Sunwook Kim, Kiyoung Choi (Seoul National University, Republic of Korea) |
| Page | pp. 29 - 34 |
| Keyword | network-on-chip(NoC), deflection routing, TSV serialization, 3D NoC, network |
| Abstract | This paper proposes a deflection routing for 3D NoC with serialized TSVs. Bufferless deflection routing provides area- and power-efficient communication under low to medium traffic load. Under 3D circumstances, the bufferless deflection routing can yield even better performance than buffered routing when key aspects are properly taken into account. Evaluation of the proposed scheme shows its effectiveness in throughput, latency, and energy consumption. |
| Slides | |
| Title | MD: Minimal Path-based Approach for Fault-Tolerant Routing in On-Chip Networks |
| Author | Masoumeh Ebrahimi, Masoud Daneshtalab, Juha Plosila (University of Turku, Finland), *Farhad Mehdipour (Kyushu University, Japan) |
| Page | pp. 35 - 40 |
| Keyword | Network-on-Chip, fault-tolerant approach, minimal path, adaptive routing algorithm. |
| Abstract | the communication requirements of many-core embedded systems are convened by the emerging Network-on-Chip (NoC) paradigm. As on-chip communication reliability is a crucial factor in many-core systems, the NoC paradigm should address the reliability issues. Using fault-tolerant routing algorithms to reroute packets around faulty regions will increase the packet latency and create congestion around the faulty region. On the other hand, the performance of NoC is highly affected by the congestion in the network. Congestion in the network can increase the delay of packets to route from a source to a destination, so it should be avoided. In this paper, a minimal and defect-resilient (MD) routing algorithm is proposed in order to route packets adaptively through shortest paths in the presence of one-faulty link, as long as a path exists. To avoid congestion, output channels can be adaptively chosen whenever the distance from the current to destination node is greater than one hop along both directions. In addition, an analytical model is presented to evaluate MD under two-faulty links’ condition. |
| Title | A Dynamic Stream Link for Efficient Data Flow Control in NoC Based Heterogeneous MPSoC |
| Author | Claude Helmstetter, Sylvain Basset, *Romain Lemaire (CEA-Leti, Minatec Campus, France), Michel Langevin, Chuck Pilkington (STMicroelectronics, Ottawa, Canada), Fabien Clermidy (CEA-Leti, Minatec Campus, France), Pierre Paulin (STMicroelectronics, Ottawa, Canada), Pascal Vivet (CEA-Leti, Minatec Campus, France), Didier Fuin (STMicroelectronics, Grenoble, France) |
| Page | pp. 41 - 46 |
| Keyword | NoC, Stream Link, Heterogeneous MPSoC, Data Flow |
| Abstract | As Systems-on-Chip size increase, the communication costs become critical and Networks-on-Chip (NoC) bring innovative solutions. Efficient stream-based protocols over NoC have been widely studied to address dataflow communications. They are usually controlled by a set of static parameters. However, new applications, such as high-resolution video decoders, present more data-dependent behaviors forcing communication protocols to support higher dynamicity. For this purpose, we present in this paper dynamic stream links for stream-based end-to-end NoC communications by introducing two link protocols, both independent of the transfer size, allowing to improve the hardware/software control flexibility. The proposed protocols have been modeled in a MPSoC virtual platform and the hardware cost evaluated. Based on simulations, we provide guidelines to exploit these protocols according to application needs. |
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