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The 20th Asia and South Pacific Design Automation Conference

Session 5B  CAD for Analog/RF/Mixed-Signal Design
Time: 13:50 - 15:30 Wednesday, January 21, 2015
Location: Room 104
Chairs: Sheldon Tan (University of California, Riverside, U.S.A.), Mark Po-Hung Lin (National Chung Cheng University, Taiwan)

5B-1 (Time: 13:50 - 14:15)
TitleAccurate Passivity-Enforced Macromodeling for RF Circuits via Iterative Zero/Pole Update Based on Measurement Data
AuthorYing-Chih Wang, Shihui Yin, Minhee Jun, *Xin Li, Lawrence T. Pileggi, Tamal Mukherjee, Rohit Negi (Carnegie Mellon University, U.S.A.)
Pagepp. 441 - 446
KeywordRF circuits, Modeling
AbstractPassive macromodeling for RF circuit blocks is a critical task to facilitate efficient system-level simulation for large-scale RF systems (e.g., wireless transceivers). In this paper we propose a novel algorithm to find the optimal macromodel that minimizes the modeling error based on measurement data, while simultaneously guaranteeing passivity. The key idea is to attack the passive macromodeling problem by solving a sequence of convex semi-definite programming (SDP) problems. As such, the proposed method can iteratively find the optimal poles and zeros for macromodeling. Our experimental results with several commercial RF circuit examples demonstrate that the proposed macromodeling method reduces the modeling error by 1.31-2.74x over other conventional approaches.
Slides

5B-2 (Time: 14:15 - 14:40)
TitlePhysical Verification Flow for Hierarchical Analog IC Design Constraints
Author*Volker Meyer zu Bexten, Markus Tristl (Infineon Technologies AG, Germany), Göran Jerke (Robert Bosch GmbH, Germany), Hartmut Marquardt (Mentor Graphics, Germany), Dina Medhat (Mentor Graphics, Egypt)
Pagepp. 447 - 453
Keywordconstraint verification, hierarchical constraints, constraint generation, circuit recognition
AbstractIn automotive applications -- as well as in other domains -- it is a major requirement that all relevant design constraints should be consistently derived and evaluated, as well as seamlessly enforced and verified in a well-documented manner. The authors present a new and industrial-strength approach to (1) derive appropriate design constraints from circuit structures, and (2) to verify constraints, such as clustering, matched orientation, matched parameters, alignment, and symmetry. Experimental results based on real-world automotive IC designs are shown.
Slides

5B-3 (Time: 14:40 - 15:05)
TitleAutomatic Design for Analog/RF Front-End System in 802.11ac Receiver
Author*Zhijian Pan, Chuan Qin, Zuochang Ye, Yan Wang (Institute of Microelectronics, Tsinghua University, China)
Pagepp. 454 - 459
KeywordAnalog/RF front-end, Design Automation
AbstractAlthough automatic optimization for individual analog/RF modules has been studied for many years, design automation for analog/RF systems that contain a complicated hierarchy of mixed-signal modules is still very challenging as the lack of an efficient way to bridge between different level descriptions in the design hierarchy. In this paper, we applied sparse regression as a modeling tool to model the modules that need to be optimized and embedded the modules in a large system to accomplish a realistic 802.11ac system design. The wireless system specification (e.g. bit error rate) for comprehensively evaluating the analog/RF front-ends is used as the optimization objective. The proposed method is implemented by linking the block-level performance metrics to the wireless system using mixed-signal simulation platform with performance modeling and Pareto optimal fronts. By this method, the receiver for 802.11ac systems is successfully designed and the worst error vector magnitude (EVM) is decreased by 34% from coarse design.

5B-4 (Time: 15:05 - 15:30)
TitleSIPredict: Efficient Post-Layout Waveform Prediction via System Identification
Author*Qicheng Huang, Xiao Li, Fan Yang, Xuan Zeng (Fudan University, China), Xin Li (Fudan University, China/Carnegie Mellon University, U.S.A.)
Pagepp. 460 - 465
KeywordSystem Identification, Post-layout, Waveform Prediction
AbstractWe propose a post-layout waveform prediction method to help designers have a quick view of the post-layout waveforms in iterative design process. Via system identification techniques, we build models to describe the relationships between pre-layout and post-layout simulation results. The model parameters are calibrated by using the simulation results of the first few data points of pre-layout and post-layout stages. By taking the corresponding pre-layout simulation results as inputs of the calibrated models, the rest post-layout waveform can be predicted.
Slides