(Back to Session Schedule)

The 21st Asia and South Pacific Design Automation Conference

Session 1A  The Optimization of Memory Architecture and Management
Time: 10:20 - 12:00 Tuesday, January 26, 2016
Location: TF4203
Chairs: Yun Liang (Peking Univ., China, China), Swathi Gurumani (Advanced Digital Sciences Center, Singapore (UIUC-ASTAR center), Singapore)

1A-1 (Time: 10:20 - 10:45)
TitlePerformance-centric Register File Design for GPUs using Racetrack Memory
Author*Shuo Wang, Yun Liang, Chao Zhang, Xiaolong Xie, Guangyu Sun (Peking Univ., China), Yongpan Liu, Yu Wang (Tsinghua Univ., China), Xiuhong Li (Peking Univ., China)
Pagepp. 25 - 30
Detailed information (abstract, keywords, etc)

1A-2 (Time: 10:45 - 11:10)
TitleImproving Read Performance of STT-MRAM based Main Memories through Smash Read and Flexible Read
AuthorLei Jiang (Advanced Micro Devices, U.S.A.), Wujie Wen (Florida International Univ., U.S.A.), *Danghui Wang (Northwestern Polytechnical Univ., China), Lide Duan (Univ. of Texas, San Antonio, U.S.A.)
Pagepp. 31 - 36
Detailed information (abstract, keywords, etc)
Slides

1A-3 (Time: 11:10 - 11:35)
TitleSTLAC: A Spatial and Temporal Locality-Aware Cache and Network-on-Chip Codesign for Tiled Many-core Systems
Author*Mingyu Wang, Zhaolin Li (Tsinghua Univ., China)
Pagepp. 37 - 42
Detailed information (abstract, keywords, etc)
Slides

1A-4 (Time: 11:35 - 12:00)
TitleA Lightweight OpenMP4 Run-time for Embedded Systems
AuthorRoberto E. Vargas, Sara Royuela, *Maria A. Serrano, Xavi Martorell, Eduardo Quiñones (Barcelona Supercomputing Center, Spain)
Pagepp. 43 - 49
Detailed information (abstract, keywords, etc)
Slides