Title | Symmetry-Aware Placement with Transitive Closure Graphs for Analog Layout Design |
Author | *Lihong Zhang (Memorial Univ. of Newfoundland, Canada), C.-J. Richard Shi (Univ. of Washington, United States), Yingtao Jiang (Univ. of Nevada, United States) |
Page | pp. 180 - 185 |
Detailed information (abstract, keywords, etc) |
Title | Constraint-Free Analog Placement with Topological Symmetry Structure |
Author | *Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu, Japan) |
Page | pp. 186 - 191 |
Detailed information (abstract, keywords, etc) |
Title | TCG-Based Muli-Bend Bus Driven Floorplanning |
Author | Tilen Ma, *Evangeline F. Y. Young (The Chinese Univ. of Hong Kong, Hong Kong) |
Page | pp. 192 - 197 |
Detailed information (abstract, keywords, etc) |
Title | Large-Scale Fixed-Outline Floorplanning Design Using Convex Optimization Techniques |
Author | *Chaomin Luo, Miguel F. Anjos (Univ. of Waterloo, Canada), Anthony Vannelli (Univ. of Guelph, Canada) |
Page | pp. 198 - 203 |
Detailed information (abstract, keywords, etc) |
Title | Bus-Aware Microarchitectural Floorplanning |
Author | Dae Hyun Kim, *Sung Kyu Lim (Georgia Inst. of Tech., United States) |
Page | pp. 204 - 208 |
Detailed information (abstract, keywords, etc) |
Title | LP Based White Space Redistribution for Thermal Via Planning and Performance Optimization in 3D ICs |
Author | *Xin Li, Yuchun Ma, Xianlong Hong, Sheqin Dong (Tsinghua Univ., China), Jason Cong (Univ. of California, Los Angeles, United States) |
Page | pp. 209 - 212 |
Detailed information (abstract, keywords, etc) |