Title | Verifying Full-Custom Multipliers by Boolean Equivalence Checking and an Arithmetic Bit Level Proof |
Author | *Udo Krautz, Markus Wedler, Wolfgang Kunz (Univ. Kaiserslautern, Germany), Kai Weber, Christian Jacobi, Matthias Pflanz (IBM, Germany) |
Page | pp. 398 - 403 |
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Title | A Symbolic Approach for Mixed-Signal Model Checking |
Author | *Alexander Jesser, Lars Hedrich (Univ. of Frankfurt a.M., Germany) |
Page | pp. 404 - 409 |
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Title | Faster Projection Based Methods for Circuit Level Verification |
Author | *Chao Yan, Mark Greenstreet (Univ. of British Columbia, Canada) |
Page | pp. 410 - 415 |
Detailed information (abstract, keywords, etc) |
Title | A Debug Probe for Concurrently Debugging Multiple Embedded Cores and Inter-Core Transactions in NoC-Based Systems |
Author | Shan Tang, *Qiang Xu (Chinese Univ. of Hong Kong, Hong Kong) |
Page | pp. 416 - 421 |
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Title | A Fast Two-Pass HDL Simulation with On-Demand Dump |
Author | *Kyuho Shim (Pusan Nat'l Univ., Republic of Korea), Youngrae Cho, Namdo Kim (Samsung Electronics, Republic of Korea), Hyuncheol Baik, Kyungkuk Kim, Dusung Kim (Pusan Nat'l Univ., Republic of Korea), Jaebum Kim, Byeongun Min, Kyumyung Choi (Samsung Electronics, Republic of Korea), Maciej Ciesielski (Logic-Mill Technology LLC, United States), Seiyang Yang (Pusan Nat'l Univ., Republic of Korea) |
Page | pp. 422 - 427 |
Detailed information (abstract, keywords, etc) |