Title | Timing Variation-Aware Task Scheduling and Binding for MPSoC |
Author | *HaNeul Chon, Taewhan Kim (Seoul National Univ., Republic of Korea) |
Page | pp. 137 - 142 |
Detailed information (abstract, keywords, etc) |
Title | Flexible and Abstract Communication and Interconnect Modeling for MPSoC |
Author | *Katalin Popovici (TIMA Lab., France), Ahmed Jerraya (CEA-LETI, Minatec, France) |
Page | pp. 143 - 148 |
Detailed information (abstract, keywords, etc) | |
Slides |
Title | Partial Order Method for Timed Simulation of System-Level MPSoC Designs |
Author | *Eric Cheung, Harry Hsieh (Univ. of California, Riverside, United States), Felice Balarin (Cadence Design Systems, United States) |
Page | pp. 149 - 154 |
Detailed information (abstract, keywords, etc) |
Title | A UML-Based Approach for Heterogeneous IP Integration |
Author | *Zhenxin Sun, Weng-Fai Wong (National Univ. of Singapore, Singapore) |
Page | pp. 155 - 160 |
Detailed information (abstract, keywords, etc) | |
Slides |