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The 15th Asia and South Pacific Design Automation Conference

Session 1B  Advanced Model Order Reduction Technique
Time: 13:30 - 15:10 Tuesday, January 19, 2010
Location: Room 101B
Chairs: Hideki Asai (Shizuoka Univ., Japan), Sheldon Tan (Univ. of California, Riverside, U.S.A.)

1B-1 (Time: 13:30 - 13:55)
TitleEfficient Model Reduction of Interconnects Via Double Gramians Approximation
AuthorBoyuan Yan, *Sheldon Tan (UC Riverside, U.S.A.), Gengsheng Chen (Fudan Univ., China), Yici Cai (Tsinghua Univ., China)
Pagepp. 25 - 30
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1B-2 (Time: 13:55 - 14:20)
TitleWideband Reduced Modeling of Interconnect Circuits by Adaptive Complex-Valued Sampling Method
AuthorHai Wang, *Sheldon Tan (UC Riverside, U.S.A.), Gengsheng Chen (Fudan Univ., China)
Pagepp. 31 - 36
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1B-3 (Time: 14:20 - 14:45)
TitleVISA: Versatile Impulse Structure Approximation for Time-Domain Linear Macromodeling
Author*Chi-Un Lei, Ngai Wong (Univ. of Hong Kong, Hong Kong)
Pagepp. 37 - 42
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Slides

1B-4 (Time: 14:45 - 15:10)
TitleAn Extension of the Generalized Hamiltonian Method to S-parameter Descriptor Systems
Author*Zheng Zhang, Ngai Wong (Univ. of Hong Kong, Hong Kong)
Pagepp. 43 - 47
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