(Back to Session Schedule)

The 17th Asia and South Pacific Design Automation Conference

Session 9B  Logic and Datapath Synthesis
Time: 16:10 - 17:50 Thursday, February 2, 2012
Location: Room 203
Chairs: Robert Wille (Univ. of Bremen, Germany), Yuichi Nakamura (NEC, Japan)

9B-1 (Time: 16:10 - 16:35)
TitleBTI-Aware Design Using Variable Latency Units
Author*Saket Gupta, Sachin Sapatnekar (Univ. of Minnesota, U.S.A.)
Pagepp. 775 - 780
Detailed information (abstract, keywords, etc)

9B-2 (Time: 16:35 - 17:00)
TitleLinear Decomposition of Index Generation Functions
Author*Tsutomu Sasao (Kyushu Inst. of Tech., Japan)
Pagepp. 781 - 788
Detailed information (abstract, keywords, etc)

9B-3 (Time: 17:00 - 17:25)
TitleFixed-Point Accuracy Analysis of Datapaths with Mixed CORDIC and Polynomial Computations
Author*Omid Sarbishei, Katarzyna Radecka (McGill Univ., Canada)
Pagepp. 789 - 794
Detailed information (abstract, keywords, etc)

9B-4 (Time: 17:25 - 17:50)
TitleAlgorithm for Synthesizing Design Context-Aware Fast Carry-Skip Adders
Author*Kiyoung Kim, Taewhan Kim (Seoul National Univ., Republic of Korea)
Pagepp. 795 - 800
Detailed information (abstract, keywords, etc)