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The 18th Asia and South Pacific Design Automation Conference

Session 1A  Special Session: Advanced Modeling and Simulation Techniques for Power/Signal Integrity in 3D Design
Time: 10:20 - 12:20 Wednesday, January 23, 2013
Organizer: Hideki Asai (Shizuoka Univ., Japan)

1A-1 (Time: 10:20 - 10:50)
Title(Invited Paper) Equivalent Circuit Model Extraction for Interconnects in 3D ICs
Author*A. Ege Engin (San Diego State Univ., U.S.A.)
Pagepp. 1 - 6
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1A-2 (Time: 10:50 - 11:20)
Title(Invited Paper) Unconditionally Stable Explicit Method for the Fast 3-D Simulation of On-Chip Power Distribution Network with Through Silicon Via
Author*Tadatoshi Sekine, Hideki Asai (Shizuoka Univ., Japan)
Pagepp. 7 - 12
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1A-3 (Time: 11:20 - 11:50)
Title(Invited Paper) Signal Integrity Modeling and Measurement of TSV in 3D IC
Author*Joungho Kim, Joungho Kim (KAIST, Republic of Korea)
Pagepp. 13 - 16
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1A-4 (Time: 11:50 - 12:20)
Title(Invited Paper) Power Distribution Network Modeling for 3-D ICs with TSV Arrays
AuthorChi-Kai Shen, Yi-Chang Lu, Yih-Peng Chiou, Tai-Yu Cheng, *Tzong-Lin Wu (National Taiwan Univ., Taiwan)
Pagepp. 17 - 22
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