Title | (Invited Paper) Equivalent Circuit Model Extraction for Interconnects in 3D ICs |
Author | *A. Ege Engin (San Diego State Univ., U.S.A.) |
Page | pp. 1 - 6 |
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Slides |
Title | (Invited Paper) Unconditionally Stable Explicit Method for the Fast 3-D Simulation of On-Chip Power Distribution Network with Through Silicon Via |
Author | *Tadatoshi Sekine, Hideki Asai (Shizuoka Univ., Japan) |
Page | pp. 7 - 12 |
Detailed information (abstract, keywords, etc) |
Title | (Invited Paper) Signal Integrity Modeling and Measurement of TSV in 3D IC |
Author | *Joungho Kim, Joungho Kim (KAIST, Republic of Korea) |
Page | pp. 13 - 16 |
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Slides |
Title | (Invited Paper) Power Distribution Network Modeling for 3-D ICs with TSV Arrays |
Author | Chi-Kai Shen, Yi-Chang Lu, Yih-Peng Chiou, Tai-Yu Cheng, *Tzong-Lin Wu (National Taiwan Univ., Taiwan) |
Page | pp. 17 - 22 |
Detailed information (abstract, keywords, etc) |