Title | Optimal Partition with Block-Level Parallelization in C-to-RTL Synthesis for Streaming Applications |
Author | *Shuangchen Li, Yongpan Liu (Tsinghua Univ., China), X.Sharon Hu (Univ. of Notre Dame, U.S.A.), Xinyu He, Yining Zhang (Tsinghua Univ., China), Pei Zhang (Y Explorations Inc., U.S.A.), Huazhong Yang (Tsinghua Univ., China) |
Page | pp. 225 - 230 |
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Title | Multi-Mode Pipelined MPSoCs for Streaming Applications |
Author | *Haris Javaid, Daniel Witono, Sri Parameswaran (Univ. of New South Wales, Australia) |
Page | pp. 231 - 236 |
Detailed information (abstract, keywords, etc) | |
Slides |
Title | Network Simplex Method Based Multiple Voltage Scheduling in Power-Efficient High-Level Synthesis |
Author | *Cong Hao, Song Chen, Takeshi Yoshimura (Waseda Univ., Japan) |
Page | pp. 237 - 242 |
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Slides |
Title | VISA Synthesis: Variation-Aware Instruction Set Architecture Synthesis |
Author | *Yuko Hara-Azumi (NAIST, Japan), Takuya Azumi (Ritsumeikan Univ., Japan), Nikil Dutt (Univ. of California, Irvine, U.S.A.) |
Page | pp. 243 - 248 |
Detailed information (abstract, keywords, etc) | |
Slides |