| Title | Compiler-Assisted Refresh Minimization for Volatile STT-RAM Cache |
| Author | Qingan Li (City Univ. of Hong Kong, Hong Kong), Jianhua Li, Liang Shi (Univ. of Science and Tech. of China, China), *Chun Jason Xue (City Univ. of Hong Kong, Hong Kong), Yiran Chen (Univ. of Pittsburgh, U.S.A.), Yanxiang He (Wuhan Univ., China) |
| Page | pp. 273 - 278 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Curling-PCM: Application-Specific Wear Leveling for Phase Change Memory based Embedded Systems |
| Author | *Duo Liu (Chongqing Univ., China), Tianzheng Wang (Univ. of Toronto, Canada), Yi Wang, Zili Shao (Hong Kong Polytechnic Univ., Hong Kong), Qingfeng Zhuge, Edwin Sha (Chongqing Univ., China) |
| Page | pp. 279 - 284 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Selectively Protecting Error-Correcting Code for Area-Efficient and Reliable STT-RAM Caches |
| Author | *Junwhan Ahn (Seoul National Univ., Republic of Korea), Sungjoo Yoo (POSTECH, Republic of Korea), Kiyoung Choi (Seoul National Univ., Republic of Korea) |
| Page | pp. 285 - 290 |
| Detailed information (abstract, keywords, etc) | |
| Title | Loadsa: A Yield-Driven Top-Down Design Method for STT-RAM Array |
| Author | Wujie Wen, Yaojun Zhang, Lu Zhang, *Yiran Chen (Univ. of Pittsburgh, U.S.A.) |
| Page | pp. 291 - 296 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |