| Title | Efficiently Finding the 'Best' Solution with Multi-Objectives from Multiple Topologies in Topology Library of Analog Circuit |
| Author | *Yu Liu, Masato Yoshioka, Katsumi Homma, Toshiyuki Shibuya (Fujitsu Laboratories Ltd., Japan) |
| Page | pp. 498 - 503 |
| Keyword | pareto-front, multi-objective optimization, analog, topology |
| Abstract | This paper presents a new method using multi-objective optimization algorithm to automatically find the best solution from a topology library of analog circuits. Comparing to the traditional optimization methods using single-objective optimization algorithms, this work can efficiently find the best non-dominated solution from multiple topologies for different specifications without additional time-consuming optimizing iterations. The experiments demonstrate that this method is feasible and practical in actual analog designs especially for uncertain or different specifications in multi-dimensions. |
| Slides |
| Title | Automated Design and Optimization of Circuits in Emerging Technologies |
| Author | *Rajesh A. Thakker, Chaitanya Sathe, Angada B. Sachid, Maryam Shojaei Baghini, V. Ramgopal Rao, Mahesh B. Patil (Department of Electrical Engineering, Indian Institute of Technology, Bombay, India) |
| Page | pp. 504 - 509 |
| Keyword | Look-up table, FinFET, Automatic design, Particle swarm optimization, Emerging technologies |
| Abstract | A novel table-based environment for
automatic design and optimization of FinFET circuits
is demonstrated. A new accurate look-up table (LUT)
technique is implemented in a circuit simulator and integrated
with particle swarm optimization algorithm
for efficient circuit designs in novel devices. Op-amp
circuits are designed and optimized to demonstrate
the accuracy and usefulness of the proposed platform.
Further, it is shown that the proposed design methodology
can take into account variations in process, supply
voltage, and temperature. |
| Title | An Automated Design Approach for CMOS LDO Regulators |
| Author | *Samiran DasGupta, Pradip Mandal (Indian Institute of Technology, Kharagpur, India) |
| Page | pp. 510 - 515 |
| Keyword | Low dropout(LDO), voltage regulator, optimal sizing, design automation |
| Abstract | This paper presents a method for optimal sizing of CMOS low drop out regulator circuits. The technique relies on the observation that many of the performance metrics of a LDO regulator can be approximated as posynomial functions of design variables. This allows the design problem to be cast as a geometric program. Geometric program is particularly attractive as the tool for optimization as —-1)it can be solved very efficiently, 2)it always finds the global minima, 3)infeasible specifications are readily determined and 4)the final solution is completely independent of the initial guess. As a result CMOS LDOs may be conveniently synthesized; moreover the optimal trade off curves between the competing performance metrics, can be obtained very fast. |
| Title | A SCORE Macromodel for PLL Designs to Analyze Supply Noise Interaction Issues at Behavioral Level |
| Author | *Chin-Cheng Kuo, Pei-Syun Lin, Chien-Nan Jimmy Liu (National Central University, Taiwan) |
| Page | pp. 516 - 521 |
| Keyword | supply noise interaction issues, analog behavioral model, PLL, macromodel |
| Abstract | Using behavioral models to perform fast simulation is currently a popular solution to verify SOC designs. Previous analog behavior modeling approaches often treat the noisy VDD waveform as a given input and focus on reflecting such stimuli on circuit performance. However, because the interaction of noise aggressors and victims is not considered, some errors may exist in the simulation. In this paper, a simple SCORE macromodel is proposed for PLL designs. It can be integrated with a supply-noise-aware PLL behavioral model to analyze supply noise effects at high level. In addition to numerical results, the time-varying supply noise waveform and real-time PLL responses can be obtained simultaneously. As demonstrated in the experimental results, the proposed approach can provide more realistic simulation results with noise interaction effects but still keep fast simulation time. |