| Title | On-Chip Power Network Optimization with Decoupling Capacitors and Controlled-ESRs |
| Author | Wanping Zhang (Qualcomm Inc./UCSD, U.S.A.), Ling Zhang, Amirali Shayan (UCSD, U.S.A.), Wenjian Yu (Tsinghua University, China), Xiang Hu (UCSD, U.S.A.), Zhi Zhu (Qualcomm Inc., U.S.A.), Ege Engin (SDSU, U.S.A.), *Chung-Kuan Cheng (UCSD, U.S.A.) |
| Page | pp. 119 - 124 |
| Keyword | Power Network, Decap, Controlled-ESR |
| Abstract | In this paper, we propose an efficient approach to minimize the noise on power networks via the allocation of decoupling capacitors (decap) and controlled equivalent series resistors (ESR). The controlled-ESR is introduced to reduce the on-chip power voltage fluctuation, including both voltage drop and overshoot. We formulate an optimization problem of noise minimization with the constraint of decap budget. A revised sensitivity calculation method is derived to consider both voltage drop and overshoot. The sequential quadratic programming (SQP) algorithm is adopted to solve the optimization problem where the revised sensitivity is regarded as the gradient. Experimental results show that considering voltage drop without overshoot leads to underestimating noise by 4.8%. We also demonstrate that the controlled-ESR is able to reduce the noise by 25% with the same decap budget. |
| Slides | |
| Title | An Adaptive Parallel Flow for Power Distribution Network Simulation Using Discrete Fourier Transform |
| Author | Xiang Hu, Wenbo Zhao, Peng Du, Amirali Shayan, *Chung-Kuan Cheng (University of California, San Diego, U.S.A.) |
| Page | pp. 125 - 130 |
| Keyword | power distribution network, discrete Fourier transform, parallel processing |
| Abstract | A frequency-time-domain co-simulation flow using discrete Fourier transform (DFT) is introduced in this paper to analyze large power distribution networks (PDN’s). The flow not only allows designers to gain an insight to the frequency-domain characteristics of the PDN but also to obtain accurate time-domain voltage responses according to different load current profiles. An adaptive method achieves accurate results within even shorter time compared to the basic DFT flow. In addition, parallel processing is incorporated which leads to a significant reduction in simulation time. Error bounds of the DFT flow are derived to assure the accuracy of simulation results. Experimental results show that the proposed flow has a relative error of 0.093% and a speedup of 10x compared to SPICE transient simulation with a single processor. |
| Slides | |
| Title | Technique for Controlling Power-Mode Transition Noise in Distributed Sleep Transistor Network |
| Author | *Yongho Lee, Taewhan Kim (Seoul National University, Republic of Korea) |
| Page | pp. 131 - 136 |
| Keyword | leakage power, circuit, current noise, performance, optimization |
| Abstract | Power gating technique is one of the effective technologies to achieve both low leakage and high performance in circuits. This work proposes a systematic solution to the problem of integrating the power-up controlling of sleep transistors into the power gated design flow in distributed sleep transistor network to take into account power-mode transition noise constraint as well as performance loss constraint. |
| Slides | |
| Title | A Novel FDTD Algorithm Based on Alternating-Direction Explicit Method with PML Absorbing Boundary Condition |
| Author | *Shuichi Aono (SESAME Technology Inc., Japan), Masaki Unno, Hideki Asai (Shizuoka University, Japan) |
| Page | pp. 137 - 141 |
| Keyword | FDTD method, explicit method, PML |
| Abstract | In this paper, we propose a new FDTD (Finite-Difference Time-Domain) method using the alternating-direction explicit (ADE) method for the efficient electromagnetic field simulation. Furthermore, the modified PML (Perfectly Matched Layer) absorbing boundary condition, which is applicable to the proposed new method, is introduced. Finally, The efficiency of the ADE-FDTD method is evaluated by computer simulations. |