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The 15th Asia and South Pacific Design Automation Conference

Session 4B  Analog Layout and Testing
Time: 10:30 - 12:10 Wednesday, January 20, 2010
Location: Room 101B
Chairs: Sachin Sapatnkar (Univ. of Minnesota, U.S.A.), Jeong-Tyng Li (SpringSoft, U.S.A.)

4B-1 (Time: 10:30 - 10:55)
TitleA Performance-Constrained Template-Based Layout Retargeting Algorithm for Analog Integrated Circuits
AuthorZheng Liu, *Lihong Zhang (Memorial Univ. of Newfoundland, Canada)
Pagepp. 293 - 298
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4B-2 (Time: 10:55 - 11:20)
TitleSymmetry-Aware TCG-Based Placement Design under Complex Multi-Group Constraints for Analog Circuit Layouts
Author*Rui He, Lihong Zhang (Memorial Univ. of Newfoundland, Canada)
Pagepp. 299 - 304
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4B-3 (Time: 11:20 - 11:45)
TitleRegularity-Oriented Analog Placement with Diffusion Sharing and Well Island Generation
Author*Shigetoshi Nakatake (Univ. of Kitakyushu, Japan), Masahiro Kawakita, Takao Ito (Toshiba Corp., Japan), Masahiro Kojima, Michiko Kojima, Kenji Izumi, Tadayuki Habasaki (NEC, Japan)
Pagepp. 305 - 311
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4B-4 (Time: 11:45 - 12:10)
TitleA Novel Characterization Technique for High Speed I/O Mixed Signal Circuit Components Using Random Jitter Injection
Author*Ji Hwan (Paul) Chun (Intel Corp., U.S.A.), Jae Wook Lee, Jacob A. Abraham (Univ. of Texas, Austin, U.S.A.)
Pagepp. 312 - 317
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