Title | (Invited Paper) Resilient Design in Scaled CMOS for Energy Efficiency |
Author | James Tschanz, Keith Bowman, Muhammad Khellah, Chris Wilkerson, Bibiche Geuskens, Dinesh Somasekhar, Arijit Raychowdhury, Jaydeep Kulkarni, Carlos Tokunaga, Shih-Lien Lu, Tanay Karnik, *Vivek K. De (Intel Corp., U.S.A.) |
Page | p. 625 |
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Slides |
Title | (Invited Paper) Benefits and Barriers to Probabilistic Design |
Author | *Siva Narendra (Tyfone, Inc./Portland State Univ., U.S.A.) |
Page | pp. 626 - 627 |
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Title | (Invited Paper) A Probabilistic Boolean Logic for Energy Efficient Circuit and System Design |
Author | Lakshmi N. B. Chakrapani (Rice Univ., U.S.A.), *Krishna Palem (Rice Univ./Nanyang Technological Univ., U.S.A.) |
Page | pp. 628 - 635 |
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Title | (Panel Discussion) Dependable Silicon Design with Unreliable Components |
Author | Organizer & Moderator: Vincent Mooney (Georgia Tech/Nanyang Technological Univ., U.S.A.), Panelists: Vivek K. De (Intel Corp., U.S.A.), Siva Narendra (Tyfone, Inc., U.S.A.), Krishna Palem (Rice Univ./Nanyang Technological Univ., U.S.A.) |
Detailed information (abstract, keywords, etc) |