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The 21st Asia and South Pacific Design Automation Conference

Session 1B  Secure Embedded Systems & IoT
Time: 10:20 - 12:00 Tuesday, January 26, 2016
Location: TF4304
Chairs: Qiaoyan Yu (University of New Hampshire, U.S.A.), Swaroop Ghosh (University of South Florida, U.S.A.)

1B-1 (Time: 10:20 - 10:45)
TitleImproving Tag Generation for Memory Data Authentication in Embedded Processor Systems
AuthorTao Liu, *Hui Guo, Sri Parameswaran (The University of New South Wales, Australia), X. Sharon Hu (University of Notre Dame, U.S.A.)
Pagepp. 50 - 55
KeywordTag Design, emory Data Integrity Protection, Low Cost Embedded Systems
AbstractData integrity is important. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. This paper studies an existing tag design (CETD) for memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered and need to be authenticated before use. Compared to other designs, this design offers the flexibility of tradeoff between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values; namely the fake values used to replace the valid data in the attack are random. However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this paper, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design.

1B-2 (Time: 10:45 - 11:10)
TitleJTAG-Based Robust PCB Authentication for Protection Against Counterfeiting Attacks
AuthorAndrew Hennessy, Yu Zheng (Case Western Reserve University, U.S.A.), *Swarup Bhunia (University of Florida, U.S.A.)
Pagepp. 56 - 61
KeywordJTAG, PUF, Security
AbstractA Printed Circuit Board (PCB) provides the backbone for interconnecting diverse electronic components into an electronic system. Unfortunately, the long and distributed supply chain of a PCB makes it vulnerable to variety of integrity violation attacks, primarily different forms of counterfeiting that includes cloning and recycling. In this paper, we propose a novel low-overhead and robust method to authenticate PCBs that utilizes an existing industry standard — IEEE 1149.1 or JTAG test infrastructure to extract high-quality signature with high entropy. Measurement results with 30 custom fabricated test boards are promising in terms of uniqueness and robustness of signature.

1B-3 (Time: 11:10 - 11:35)
TitleMaximizing Level of Confidence for Non-Equidistant Checkpointing
Author*Dimitar Nikolov, Erik Larsson (Lund University, Sweden)
Pagepp. 62 - 68
Keywordsoft errors, reliability analysis, real-time systems, checkpoinitng
AbstractEmploying fault tolerance often introduces a time overhead, which may cause a deadline violation in real-time systems (RTS). Therefore, for RTS it is important to optimize the fault tolerance techniques such that the probability to meet the deadlines, i.e. the Level of Confidence (LoC), is maximized. Previous studies have focused on evaluating the LoC for equidistant checkpointing. However, no studies have addressed the problem of evaluating the LoC for non-equidistant checkpointing. In this work, we provide an expression to evaluate the LoC for non-equidistant checkpointing, and propose the Clustered Checkpointing method that distributes a given number of checkpoints with the goal to maximize the LoC. The results show that the LoC can be improved when non-equidistant checkpointing is used.
Slides

1B-4 (Time: 11:35 - 12:00)
TitleA Mutual Auditing Framework to Protect IoT against Hardware Trojans
AuthorChen Liu, Patrick Cronin, *Chengmo Yang (University of Delaware, U.S.A.)
Pagepp. 69 - 74
Keywordhardware Trojan, cryptography, IoT security
AbstractIn an internet of Things (IoT), hardware Trojans implanted in individual nodes, which are malicious modifications to a circuit, may utilize the wireless connection facility to leak confidential information or to collude with each other. To defend against this threat, we develop a lightweight framework to detect Trojans with affordable performance and energy overhead. We propose to exploit message encryption and vendor diversity among the nodes to build a distributed mutual auditing framework wherein nodes monitor the trustworthiness of their neighbors.
Slides