ASP-DAC 2018 Best Design Award 4A-1

An Ultra-Low-Noise Differential Relaxation Oscillator based on a Swing-Boosting Scheme

An Ultra-Low-Noise Differential Relaxation Oscillator based on a Swing-Boosting Scheme
Daegu Gyeongbuk Inst. of Science and Tech., Republic of Korea
Junghyup Lee, Arup George
KAIST, Republic of Korea
Minkyu Je

ASP-DAC 2018 Best Design Award 4A-2

A Nonvolatile Flip-Flop-Enabled Cryptographic Wireless Authentication Tag with Per-Query Key Update and Power-Glitch Attack Countermeasures

A Nonvolatile Flip-Flop-Enabled Cryptographic Wireless Authentication Tag with Per-Query Key Update and Power-Glitch Attack Countermeasures
MIT, U.S.A.
Chiraag S. Juvekar
Texas Instruments, U.S.A.
Joyce Kwong
Korea Univ., Republic of Korea
Hyung-Min Lee
MIT, U.S.A.
Anantha P. Chandrakasan

ASP-DAC 2018 Special Feature Award 4A-3

A 42nJ/conversion On-Demand State-of-Charge Indicator for Miniature IoT Li-ion Batteries

A 42nJ/conversion On-Demand State-of-Charge Indicator for Miniature IoT Li-ion Batteries
Korea Univ., Republic of Korea
Junwon Jeong
Univ. of Michigan, U.S.A.
Seokhyeon Jeong
Korea Univ., Republic of Korea
Chulwoo Kim
Univ. of Michigan, U.S.A.
Dennis Sylvester, David Blaauw

ASP-DAC 2018 Special Feature Award 4A-4

A Supply Noise Insensitive PLL with a Rail-to-Rail Swing Ring Oscillator and a Wideband Noise Suppression Loop

A Supply Noise Insensitive PLL with a Rail-to-Rail Swing Ring Oscillator and a Wideband Noise Suppression Loop
KAIST, Republic of Korea
Dongin Kim, SeongHwan Cho

ASP-DAC 2018 Special Feature Award 4A-5

A Dual-Output SC Converter with Dynamic Power Allocation for Multi-Core Application Processors

A Dual-Output SC Converter with Dynamic Power Allocation for Multi-Core Application Processors
Hong Kong Univ. of Science and Tech., Hong Kong
Junmin Jiang
Univ. of Macau, Macau
Yan Lu
Hong Kong Univ. of Science and Tech., Hong Kong
Xun Liu, Wing-Hung Ki, Philip K. T. Mok
Univ. of Macau, Macau
Seng-Pan U, Rui P. Martins

ASP-DAC 2017 Best Design Award 1S-1

W-Band Ultra-High Data-Rate 65nm CMOS Wireless Transceiver

W-Band Ultra-High Data-Rate 65nm CMOS Wireless Transceiver
Tokyo Inst. of Tech., Japan
Korkut Kaan Tokgoz, Shotaro Maki, Seitarou Kawai, Noriaki Nagashima, Kenichi Okada, Akira Matsuzawa
Fujitsu Labs., Japan
Yoichi Kawano, Toshihide Suzuki, Taisuke Iwai

ASP-DAC 2017 Special Feature Award 1S-20

Design of High-Frequency Piezoelectric Resonator-Based Cascaded Fractional-N PLL with Sub-ppb-Order Channel Adjusting Technique

Design of High-Frequency Piezoelectric Resonator-Based Cascaded Fractional-N PLL with Sub-ppb-Order Channel Adjusting Technique
Tokyo Inst. of Tech., Japan
Yosuke Ishikawa, Sho Ikeda, Hiroyuki Ito, Takayoshi Obara, Naoki Noguchi, Koji Kamisuki, Yao Jiyang, Shiro Dosho, Noboru Ishihara, Kazuya Masu
NICT, Japan
Akihumi Kasamatsu, Shinsuke Hara, Ruibing Dong

ASP-DAC 2016 1S-5

A 200-MHz 4-Phase Fully Integrated Voltage Regulator with Local Ground Sensing Dual Loop ZDS Hysteretic Control Using 6.5nH Package Bondwire Inductors on 65nm Bulk CMOS

A 200-MHz 4-Phase Fully Integrated Voltage Regulator with Local Ground Sensing Dual Loop ZDS Hysteretic Control Using 6.5nH Package Bondwire Inductors on 65nm Bulk CMOS
Univ. of Texas, Dallas, U.S.A.
Min Kyu Song, Joseph Sankman, Jayeol Lee, and *Dongsheng Ma

ASP-DAC 2016 1S-4

A 2.2 μW 15b Incremental Delta-Sigma ADC with Output-Driven Input Segmentation

A 2.2 μW 15b Incremental Delta-Sigma ADC with Output-Driven Input Segmentation
HKUST, Hong Kong
Bo Wang
Univ. of Macau, Macau
Man-Kay Law
HKUST, Hong Kong
Saqib Mohamad
Hamad Bin Khalifa Univ., Qatar
Amine Bermak

ASP-DAC 2015 1S-1

An HDL-Synthesized Gated-Edge-Injection PLL with A Current Output DAC

An HDL-Synthesized Gated-Edge-Injection PLL with A Current Output DAC
Tokyo Institute of Technology, Japan
Dongsheng Yang, Wei Deng, Tomohiro Ueno, Teerachot Siriburanon, Satoshi Kondo, Kenichi Okada, Akira Matsuzawa

ASP-DAC 2015 1S-23

Circuit and Package Design for 44GB/s Inductive-Coupling DRAM/SoC Interface

Circuit and Package Design for 44GB/s Inductive-Coupling DRAM/SoC Interface
Keio University, Japan
Akira Okada, Abdul Raziz Junaidi, Yasuhiro Take, Atsutake Kosuge, Tadahiro Kuroda

ASP-DAC 2014 1A-1

A Dual-Loop Injection-Locked PLL with All-Digital Background Calibration System for On-Chip Clock Generation

A Dual-Loop Injection-Locked PLL with All-Digital Background Calibration System for On-Chip Clock Generation
Tokyo Institute of Technology, Japan
Wei Deng, Ahmed Musa, Teerachot Siriburanon, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa

ASP-DAC 2014 1A-7

A Single-Inductor 8-Channel Output DC-DC Boost Converter with Time-Limited Power Distribution Control and Single Shared Hysteresis Comparator

A Single-Inductor 8-Channel Output DC-DC Boost Converter with Time-Limited Power Distribution Control and Single Shared Hysteresis Comparator
Korea Univ., Republic of Korea
Jungmoon Kim, Chulwoo Kim

ASP-DAC 2013 1D-1

A 40-nm 144-mW VLSI Processor for Real-time 60-kWord Continuous Speech Recognition

A 40-nm 144-mW VLSI Processor for Real-time 60-kWord Continuous Speech Recognition
Kobe Univ., Japan
Guangji He, Takanobu Sugahara, Tsuyoshi Fujinaga, Yuki Miyamoto, Hiroki Noguchi, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto

ASP-DAC 2013 1D-21

A 0.35-0.8V 8b 0.5-35MS/s 2bit/step Extremely-low Power SAR ADC

A 0.35-0.8V 8b 0.5-35MS/s 2bit/step Extremely-low Power SAR ADC
Keio Univ., Japan
Kentaro Yoshioka, Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro

ASP-DAC 2012 D1-2

A 120-mV Input, Fully Integrated Dual-Mode Charge Pump in 65-nm CMOS for Thermoelectric Energy Harvester

Univ. of Tokyo, Japan
Po-Hung Chen, Koichi Ishida, Xin Zhang
STARC, Japan
Yasuyuki Okuma, Yoshikatsu Ryu
Univ. of Tokyo, Japan
Makoto Takamiya, Takayasu Sakurai

ASP-DAC 2011 1D-1

A H.264/MPEG-2 Dual Mode Video Decoder Chip Supporting Temporal/Spatial Scalable Video

A H.264/MPEG-2 Dual Mode Video Decoder Chip Supporting Temporal/Spatial Scalable Video
National Chung Cheng Univ., Taiwan
Cheng-An Chien, Yao-Chang Yang, Hsiu-Cheng Chang, Jia-Wei Chen, Cheng-Yen Chang, Jiun-In Guo, Jinn-Shyan Wang
Feng Chia Univ., Taiwan
Ching-Hwa Cheng

ASP-DAC 2011 1D-15

A 58-63.6GHz Quadrature PLL Frequency Synthesizer Using Dual-Injection Technique

A 58-63.6GHz Quadrature PLL Frequency Synthesizer Using Dual-Injection Technique
Tokyo Inst. of Tech., Japan
Ahmed Musa, Rui Murakami, Takahiro Sato, Win Chiavipas, Kenichi Okada, Akira Matsuzawa

ASP-DAC 2010 4D-1

Checker-Pattern and Shared Two Pixels LOFIC CMOS Image Sensors

Checker-Pattern and Shared Two Pixels LOFIC CMOS Image Sensors
Tohoku Univ., Japan
Yoshiaki Tashiro, Shun Kawada, Shin Sakai, Shigetoshi Sugawa

ASP-DAC 2009 1D-1

A Wireless Real-Time On-Chip Bus Trace System

A Wireless Real-Time On-Chip Bus Trace System
Keio University, Japan
Shusuke Kawai, Takayuki Ikari
Renesas design Corp, Japan
Yutaka Takikawa
Keio University, Japan
Hiroki Ishikuro, Tadahiro Kuroda

ASP-DAC 2009 1D-13

Ultra Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids

Ultra Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids
National Chiao Tung University, Taiwan
Yu-Ting Kuo, Tay-Jyi Lin, Yueh-Tai Li
ITRI, STC, Taiwan
Chou-Kun Lin
National Chiao Tung University, Taiwan
Chih-Wei Liu

ASP-DAC 2008 1D-1

A 1.2GHz Delayed Clock Generator for High-speed Microprocessors

Korea Univ., Republic of Korea
Inhwa Jung, Moo-Young Kim, and Chulwoo Kim

ASP-DAC 2008 1D-7

Dynamic Supply Noise Measurement Circuit Composed of Standard Cells Suitable for In-Site SoC Power Integrity Verification

Osaka Univ., Japan
Yasuhiro Ogasahara, Masanori Hashimoto, and Takao Onoye

ASP-DAC 2007 1D-9 

Improving Execution Speed of FPGA using Dynamically Reconfigurable Technique

Improving Execution Speed of FPGA using Dynamically Reconfigurable Technique
Tohoku Univ., Japan
Roel Pantonial, Md. Ashfaquzzaman Khan, *Naoto Miyamoto, Koji Kotani, Shigetoshi Sugawa, Tadahiro Ohmi

ASP-DAC 2007 1D-13

Implementation of a Standby-Power-Free CAM Based on Complementary Ferroelectric-Capacitor Logic

Implementation of a Standby-Power-Free CAM Based on Complementary Ferroelectric-Capacitor Logic
Tohoku Univ., Japan
Shoun Matsunaga, Takahiro Hanyu
ROHM, Japan
Hiromitsu Kimura, Takashi Nakamura, Hidemi Takasu

ASP-DAC 2006 1D-15

A 52mW 1200MIPS Compact DSP for Multi-Core Media SoC

A 52mW 1200MIPS Compact DSP for Multi-Core Media SoC
National Chiao Tung Univ., Taiwan
Shih-Hao Ou, Tay-Jyi Lin, Chao-Wei Huang, Yu-Ting Kuo, Chie-Min Chao, Chih-Wei Liu
STC, ITRI, Taiwan
Chein-Wei Jen

ASP-DAC 2006 1D-1

A Low Dynamic Power and Low Leakage Power 90-nm CMOS Square-Root Circuit

A Low Dynamic Power and Low Leakage Power 90-nm CMOS Square-Root Circuit
Chuo Univ., Japan
Tadayoshi Enomoto, Nobuaki Kobayashi

ASP-DAC 2006 1D-8

Adaptively-Biased Capacitor-Less CMOS Low Dropout Regulator with Direct Current Feedback

Adaptively-Biased Capacitor-Less CMOS Low Dropout Regulator with Direct Current Feedback
Hong Kong Univ. of Science and Tech., Hong Kong
Yat-Hei Lam, Wing-Hung Ki, Chi-Ying Tsui

ASP-DAC 2004 6C-1

Design of Real-Time VGA 3-D Image Sensor Using Mixed-Signal Techniques

Univ. of Tokyo, Japan
Y. Oike, M. Ikeda, K. Asada

ASP-DAC 2004 6C-2

A Bandwidth and Memory Efficient MPEG-4 Shape Encoder

National Chiao Tung Univ., Taiwan
K. Lee, N. Y. Chang, H. Chin, H. Hsu, C. Jen

ASP-DAC 2004 6C-9

Fast Adaptive DC-DC Conversion Using Dual-Loop One-Cycle Control in Standard Digital CMOS Process

HKUST, Hong Kong
D. Ma, W. Ki, C. Tsui

ASP-DAC 2003 6D-5

A Still Image Encoder Based on Adaptive Resolution Vector Quantization Employing Needless Calculation Elimination Architecture

Tohoku Univ., Japan
M. Fujibayashi, T. Nozawa, T. Nakayama, K. Mochizuki, K. Kotani, S. Sugawa, T. Ohmi

ASP-DAC 2003 6D-17

A Nearest-Hamming-Distance Search Memory With Fully Parallel Mixed Digital-Analog Match Circuitry

Hiroshima Univ., Japan
T. Koide, H. J. Mattausch, Y. Yano, T. Gyohten, Y. Soda

ASP-DAC 2003 6D-2

A Highly Efficient AES Cipher Chip

National Tsing Hua Univ., Taiwan
Chih-Pin Su, Tsung-Fu Lin, Chih-Tsun Huang, and Cheng-Wen Wu

ASP-DAC 2002

High-sensitivity and Wide-dynamic-range Position Sensor Using Logarithmic-response and Correlation Circuit

Yusuke Oike, Makoto Ikeda, Kunihiro Asada – University of Tokyo, Japan

ASP-DAC 2001 A1-5

Single Chip 3D Rendering Engine Integrating Embedded DRAM Frame Buffer and Hierarchical Octet Tree (HOT) Array Processor with Bandwidth Amplification

Korea Advanced Institute of Science and Technology, *Electronics and Telecommunications Research Institute
Yong-Ha Park, *Seon-Ho Han, and Hoi-Jun Yoo

ASP-DAC 2001 A1-11

A Smart Position Sensor for 3-D Measurement

Department of Electronics Engineering, VLSI design and Education Center, The University ofTokyo
Tomohiro Nezuka, Masashi Hoshino, Makoto Ikeda, and Kunihiro Asada

ASP-DAC 2001 A1-13

A Parallel Vector Quantization Processor Featuring An Effective Search Algorithm for Real-time Motion Picture Compression

Department of Electronic Engineering, Tohoku University, New Industry Creation Hatchery Center,Tohoku University
Toshiyuki Nozawa, Makoto Imai, Masanori Fujibayashi, and Tadahiro Ohmi

ASP-DAC 2000 A1-1

A VLSI Implementation of the Blowfish Encryption/Decryption Algorithm

National Tsing Hua University
Michael C.-J.Lin and Youn-Long Lin

ASP-DAC 2000 A1-13

An Application Specific JAVA Processor with Reconfigurabilities

Graduate School of Information Science, Nara Institute of Science and Technology
Shinji Kimura, Hiyoyuki Kida, Kazuyoshi Takagi, Tatsumori Abematsu and Katsumasa Watanabe

ASP-DAC 2000 A1-10

A Smart Imager for the Vision Processing Front-END

Advanced Scientific of Matter, Hiroshima University
Noriaki Takeda, Mitsuru Homma, Makoto Nagata, Takashi Morie and Atsushi Iwata

ASP-DAC 1999 2C-7

A 16-bit DSP and System for Baseband/Voiceband Processing of IS-136 Cellular Telephony

Korea Advanced Institute of Science and Technology
Tae Hun Kim, Jeongsik Yang, Kyoo Hyun Lim, Jin Wook Kim,Jeong Eun Lee, Hyoung Sik Nam, Young Gon Kim, Jeong Pyo Kim,Sang Jin Byun, Bae Sung Kwon, and Beomsup Kim

ASP-DAC 1999 2C-5

Motion Estimator LSI for MPEG2 High Level Standard

Tokyo Institute of Technology
Li, Jiang, Dongju Li, Shintaro Haba, Chawalit Honsawek, and Hiroaki Kunieda

ASP-DAC 1998 5D.1P

TITAC-2: An asynchronous 32-bit microprocessor

Tokyo Institute of Technology, University of Tokyo
Akihiro Takamura, Motokazu Ozawa, Izumi Fukasaku, Taro Fujii, Yoichiro Ueno, Masashi, Imai, Masashi Kuwako, Takashi Nanya 

ASP-DAC 1998 5D.4P

Metacore: A Configurable and Instruction Level Extensible DSP Core

KAIST
Jin-Hyuk Yang, Byung-Woon Kim, Sung-Won Seo, Sang-Jun Nam, Chang-Ho Ryu, Jang-Ho Cho, Chong-Min Kyung

ASP-DAC 1998 5D.11P

A CMOS Smart Image Sensor LSI for Focal-Plane Compression

Toyohashi University of Technology, Matsushita Electric Industrial Co. Ltd.
Shoji Kawahito, Makoto Yoshida, Masaaki Sasaki, Daisuke Miyazaki, Yoshiaki Tadokoro,Kenji Murata, Shiro Doushou, Akira Matsuzawa