Special Sessions
- Date: January 26 - 28, 2016
- Place: Holiday Inn Macao Cotai Central
Date/Time | Title | |
1S | Tuesday, January 26 10:20-12:00 |
Presentation + Poster Discussion: "University LSI Design Contest" |
2S | Tuesday, January 26 13:50-15:30 |
Invited Talks: “Designing with Spintronics: Recent Developments and Upcoming Challenges" |
3S | Tuesday, January 26 15:50-17:30 |
Invited Talks: “High-Level Synthesis – Now, the Future, and the "Dark Secrets"” |
4S | Wednesday, January 27 10:20-12:00 |
Invited Talks: “Design Challenges for Energy-Efficient IoT Edge Devices” |
5S | Wednesday, January 27 13:50-15:55 |
Invited Talks: “Cross-Layer Resilience: Snapshots from the Frontier of Design” |
5A | Wednesday, January 27 13:50-15:55 |
Invited Talks: “Design Automation of Energy-Efficient Smart Buildings and Smart Cars” |
6S | Thursday, January 28 10:20-12:00 |
Invited Talks: “Cyber-Physical Systems and Security” |
7S | Thursday, January 28 13:50-15:30 |
Invited Talks: “New Frontiers of Physical Design” |
8S | Thursday, January 28 15:50-17:30 |
Invited Talks: “Reliability, Adaptability and Flexibility in Timing” |
1S: Tuesday, January 26, 10:20-12:00
Presentation + Poster Discussion: "University LSI Design Contest"
2S: Tuesday, January 26, 13:50-15:30
- Invited Talks: “Designing with Spintronics: Recent Developments and Upcoming Challenges”
- Organizer/Chair: Sachin S. Sapatnekar (Univ. of Minnesota, U.S.A.)
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- 1: Logic and Memory Design using Spin-based Circuits
Zhaoxin Liang, Meghna Mankalale, Brandon Del Bel, Sachin S. Sapatnekar (Univ. of Minnesota, U.S.A.) - 2: Architecture Design with STT-RAM: Opportunities and Challenges
Ping Chi, Shuangchen Li, Yuanqing Cheng, Yu Lu, Seung Kang, Yuan Xie (Univ. of California, Santa Barbara, U.S.A.) - 3: Prospects of Efficient Neural Computing with Arrays of Magneto-metallic Neurons and Synapses
Kaushik Roy (Purdue Univ., U.S.A.)
- 1: Logic and Memory Design using Spin-based Circuits
3S: Tuesday, January 26, 15:50-17:30
- Invited Talks: “High-Level Synthesis – Now, the Future, and the "Dark Secrets"”
- Organizer: Deming Chen (UIUC, U.S.A.), Chair: Eric Yun Liang (Peking Univ., China)
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- 1: Design and Verification Using High-Level Synthesis
Andres Takach (Mentor Graphics, U.S.A.) - 2: High-Level Synthesis of Accelerators in Embedded Scalable Platforms
Paolo Mantovani, Giuseppe Di Guglielmo, Luca P. Carloni (Columbia Univ., U.S.A.) - 3: High Quality IP Designs using High Level Synthesis Design Flow
*Qiang Zhu (Cadence Design Systems, Japan), Masato Tatsuoka (Socionext Inc., Japan) - 4: A Systematic Study and Evaluation of Current High-level Synthesis Tools
Zelei Sun (UIUC, U.S.A.), Keith Campbell (UIUC), Wei Zuo (UIUC, U.S.A.), Kyle Rupnow, Swathi Gurumani (ADSC, U.S.A.), Frederic Doucet (Qualcomm, U.S.A.), Deming Chen (UIUC, U.S.A.)
- 1: Design and Verification Using High-Level Synthesis
4S: Wednesday, January 27, 10:20-12:00
- Invited Talks: "Design Challenges for Energy-Efficient IoT Edge Devices"
- Organizers/Chairs: Saibal Mukhopadhyay (Georgia Tech, U.S.A.), Vijay Raghunathan (Purdue Univ., U.S.A.)
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- 1: Energy-Efficient System Design for IoT Devices
Hrishikesh Jayakumar, Arnab Raha, Younghyun Kim, Soubhagya Sutar, Woosuk Lee, Vijay Raghunathan (Purdue Univ., U.S.A.) - 2: Energy Delivery for Self-Powered IoT Devices
Khondker Z. Ahmed, Monodeep Kar, Saibal Mukhopadhyay (Georgia Tech, U.S.A.) - 3: Efficient Embedded Learning for IoT Devices
Swagath Venkataramani, Kaushik Roy, Anand Raghunathan (Purdue Univ., U.S.A.) - 4: Computing with Coupled Spin Torque Nano Oscillators
Karthik Yogendra, Deliang Fan, Yong Shim, Minsuk Koo, Kaushik Roy (Purdue Univ., U.S.A.)
- 1: Energy-Efficient System Design for IoT Devices
5S: Wednesday, January 27, 13:50-15:55
- Invited Talks: "Cross-Layer Resilience: Snapshots from the Frontier of Design"
- Organizer: Ulf Schlichtmann (TUM, Germany), Chair: Jörg Henkel (KIT, Germany)
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- 1: Efficient Reliability Management in SoCs – An Approximate DRAM Perspective
Matthias Jung, Deepak M. Mathew, Christian Weis, *Norbert Wehn (University of Kaiserslautern, Germany) - 2: Cross-layer Virtual/Physical Sensing and Actuation for Resilient Heterogeneous Many-core SoCs
Santanu Sarma, Tiago Mück, Majid Shoushtari, Abbas BanaiyanMofrad, Nikil Dutt (UC Irvine, U.S.A.) - 3: On-chip Monitoring and Compensation Scheme with Fine-grain Body Biasing for Robust and Energy-Efficient Operations
A.K.M. Mahfuzul Islam (University of Tokyo, Japan), Hidetoshi Onodera (Kyoto University, Japan) - 4: Embedded Software Reliability Testing by Unit-Level Fault Injection
Petra Maier, Daniel Mueller-Gritschneder, Ulf Schlichtmann (TU Munich, Germany), *Veit Kleeberger (Infineon Technologies, Germany)
- 1: Efficient Reliability Management in SoCs – An Approximate DRAM Perspective
5A: Wednesday, January 27, 13:50-15:55
- Invited Talks: "Design Automation of Energy-Efficient Smart Buildings and Smart Cars"
- Organizer/Chair: Naehyuck Chang (KAIST, Republic of Korea)
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- 1: Thermal Modeling for Energy-Efficient Smart Building With Advanced Overfitting Mitigation Technique
Wandi Liu, Hai Wang (University of Electronic Science and Technology of China, China), Hengyang Zhao (University of California at Riverside, U.S.A.), Shujuan Wang (Uniersity of California at Riverside, U.S.A.), Haibao Chen, Yuzhou Fu (Shanghai Jiaotong University, China), Jian Ma (University of Electronic Science and Technology of China, China), Xin Li (Carnegie Mellon University, U.S.A.), *Sheldon X.-D. Tan (University of California at Riverside, U.S.A.) - 2: Modeling, Analysis, and Optimization of Electric Vehicle HVAC Systems
*Mohammad Abdullah Al Faruque, Korosh Vatanparvar (UC Irvine, U.S.A.) - 3: Distributed Reconfigurable Battery System Management Architectures
*Sebastian Steinhorst (TUM CREATE Ltd., Singapore), Zili Shao (The Hong Kong Polytechnic University, Hong Kong), Samarjit Chakraborty (TU Munich, Germany), Matthias Kauer (TUM CREATE Ltd., Singapore), Shuai Li (The Hong Kong Polytechnic University, Hong Kong), Martin Lukasiewycz, Swaminathan Narayanaswamy (TUM CREATE Ltd., Singapore), Muhammad Usman Rafique, Qixin Wang (The Hong Kong Polytechnic University, Hong Kong) - 4: Minimum-Energy Driving Speed Profiles for Low-Speed Electric Vehicles
Donkyu Baek, Joonki Hong, Naehyuck Chang (KAIST, Republic of Korea)
- 1: Thermal Modeling for Energy-Efficient Smart Building With Advanced Overfitting Mitigation Technique
6S: Thursday, January 28, 10:20-12:00
- Invited Talks: "Cyber-Physical Systems and Security"
- Organizer: Jeyavijayan Rajendran (University of Texas at Dallas, U.S.A.)
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- 1: Enabling Multi-Layer Cyber-Security Assessment of Industrial Control Systems through Hardware-in-the-Loop Testbeds
Anastasis Keliris, Charalambos Konstantinou, Nektarios Georgios Tsoutsos (New York University, U.S.A.), Raghad Baiad, *Michail Maniatakos (New York University Abu Dhabi, U.S.A.) - 2: Security analysis on consumer and industrial IoT Devices
Jacob Wurm, Khoa Hoang, Orlando Arias (University of Central Florida, U.S.A.), Ahmad-Reza Sadeghi (TU Darmstadt, Germany), Yier Jin (University of Central Florida, U.S.A.) - 3: Magnetic Side- and Covert-Channel Attacks using Smartphones
Jakub Szefer (Yale University, U.S.A.) - 4: Multi-valued Arbiters for Quality Enhancement of PUF Responses on FPGA Implementation
*Siarhei S. Zalivaka (Nanyang Technological University,, Singapore), Alexander V. Puchkov, Vladimir P. Klybik, Alexander A. Ivaniuk (Belarusian State University of Informatics and Radioelectronics, Belarus), *Chip-Hong Chang (Nanyang Technological University, Singapore)
- 1: Enabling Multi-Layer Cyber-Security Assessment of Industrial Control Systems through Hardware-in-the-Loop Testbeds
7S: Thursday, January 28, 13:50-15:30
- 1: Advanced multi-patterning and hybrid lithography techniques
Fedor G. Pikus (Mentor Graphics, U.S.A.), Andres J. Torres (Mentor Graphics, U.S.A.) - 2: Recent Research Development and New Challenges in Analog Layout Synthesis
Mark Po-Hung Lin (National Chung Cheng University, Taiwan), Yao-Wen Chang (National Taiwan University, Taiwan), Chih-Ming Hung (MediaTek, Taiwan) - 3: Detecting and Masking Hardware Trojans in Digital Circuits by Reverse Engineering and Functional ECO
Xing Wei, Yi Diao, Yu-Liang Wu (Easy-Logic Technology Ltd., Hong Kong)
8S: Thursday, January 28, 15:50-17:30
- Invited Talks: "Reliability, Adaptability and Flexibility in Timing"
- Organizer: Bing Li (Tech. Univ. München, Germany), Chair: Hidetoshi Onodera (Kyoto Univ., Japan)
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- 1: Reliability, Adaptability and Flexibility in Timing: Buy a Life Insurance for Your Circuits
Ulf Schlichtmann (TU Munich, Germany), Masanori Hashimoto (Osaka University, Japan), Iris Hui-Ru Jiang (National Chiao Tung University, Taiwan), Bing Li (TU Munich, Germany)
- 1: Reliability, Adaptability and Flexibility in Timing: Buy a Life Insurance for Your Circuits