| Title | NVPsim： A Simulator for Architecture Explorations of Nonvolatile Processors |
| Author | Yizi Gu, *Yongpan Liu, Yiqun Wang, Hehe Li, Huazhong Yang (Tsinghua Univ., China) |
| Page | pp. 147 - 152 |
| Detailed information (abstract, keywords, etc) | |
| Title | MCSSim: A Memory Channel Storage Simulator |
| Author | *Renhai Chen, Zili Shao (Hong Kong Polytechnic Univ., Hong Kong), Chia-Lin Yang (National Taiwan Univ., Taiwan), Tao Li (Univ. of Florida, U.S.A.) |
| Page | pp. 153 - 158 |
| Detailed information (abstract, keywords, etc) | |
| Title | Trace-Based Context-Sensitive Timing Simulation Considering Execution Path Variations |
| Author | *Sebastian Ottlik, Jan Micha Borrmann, Sadik Asbach, Alexander Viehl (FZI Research Center for Information Technology, Germany), Wolfgang Rosenstiel, Oliver Bringmann (Univ. of Tübingen, Germany) |
| Page | pp. 159 - 165 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Generating High Coverage Tests for SystemC Designs Using Symbolic Execution |
| Author | *Bin Lin, Zhenkun Yang, Kai Cong, Fei Xie (Portland State Univ., U.S.A.) |
| Page | pp. 166 - 171 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |