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The 14th Asia and South Pacific Design Automation Conference

Session 3D  Special Session: Hardware Dependent Software for Multi- and Many-Core Embedded Systems
Time: 15:55 - 18:00 Tuesday, January 20, 2009
Location: Room 416+417
Organizers: Rainer Doemer (University of California at Irvine, United States), Andreas Gerstlauer (University of Texas at Austin, United States), Wolfgang Mueller (University of Paderborn, Germany)

3D-1 (Time: 15:55 - 16:10)
Title(Invited Paper) Introduction to Hardware-dependent Software Design
Author*Rainer Dömer (University of California at Irvine, United States), Andreas Gerstlauer (University of Texas at Austin, United States), Wolfgang Müller (University of Paderborn, Germany)
Pagepp. 290 - 292
AbstractDue to the rapidly increasing software content in embedded systems, Hardware-dependent Software (HdS) has become a critical topic in system design. In this talk, we will motivate the need for special attention to HdS in research and development and provide a brief introduction to the issues involved in the design of HdS.
Slides

3D-2 (Time: 16:10 - 16:50)
Title(Invited Paper) Using a Dataflow abstracted Virtual Prototype for HdS-Design
AuthorWolfgang Ecker, Stefan Heinen, *Michael Velten (Infineon Technologies AG, Germany)
Pagepp. 293 - 300
KeywordAbstraction, VP, TLM, HdS
AbstractThe complexity of Hardware-dependent Software (HdS) continuously grows stronger than chip complexity since more and more tasks are moved to software. Clearly, the pressure on the development of new methodologies for early validation of HdS increases as well. Existing methods must be continuously improved and new methods must be developed. This is exemplified with a state-of-the-art Transaction Level (TL) model used for firmware development of a productive wireless communication chip. By discussing the strengths and shortcomings of TL modeling we derive a set of requirements for a future modeling paradigm, which led to the new data flow abstraction approach presented in this paper. Experiments showed that we gain up to 10x performance improvement.
Slides

3D-3 (Time: 16:50 - 17:20)
Title(Invited Paper) Needs and Trends in Embedded Software Development for Consumer Electronics
Author*Yasutaka Tsunakawa (Sony Corporation, Japan)
Pagepp. 301 - 303
KeywordEmbedded software, Consumer electronics, Multi-Core, Many-Core
AbstractLike other domains, the flow to Many-Core cannot be avoided in the domain of the consumer electronics either. The Multi-Core has already become the mainstream of the system LSI, and the number of cores in the chip will continue to increase. Because of the advancement of required functions and the pressure to the consumption electricity reduction, the flow to Many-Core will continue without cessation. However, seeing it from a point of view of the embedded software development, there are many unsolved problems lie like a huge cliff between current Multi-Core and Many-Core. The research organizations seem to make their main efforts in technical establishment of Many-Core, and the tool vendors concentrate on a solution offer to the current Multi-Core. Therefore measures of the transition period will come several years later are still insufficient. In this article, I want to discuss about the major problems which block the shift to Many-Core from the current Multi-Core, from the viewpoint of consumer electronics.
Slides

3D-4 (Time: 17:20 - 18:00)
Title(Invited Paper) Hardware-dependent Software Synthesis for Many-Core Embedded Systems
Author*Samar Abdi, Gunar Schirner, Ines Viskic, Hansu Cho, Yonghyun Hwang, Lochi Yu, Daniel Gajski (Center for Embedded Computer Systems, University of California, Irvine, United States)
Pagepp. 304 - 310
KeywordEmbedded Software, Multicore Design, Software Synthesis
AbstractThis paper presents synthesis of Hardware Dependent Software (HdS) for multicore and many-core designs using Embedded System Environment (ESE). ESE is a tool set, developed at UC Irvine, for transaction level design of multicore embedded systems. HdS synthesis is a key component of ESE backend design ow. We follow a design process that starts with an application model consisting of C processes communicating via abstract message passing channels. The application model is mapped to a platform net-list of SW and HW cores, buses and buffers. A high speed transaction level model (TLM) is generated to validate abstract communication between processes mapped to different cores. The TLM is further rened into a Pin-Cycle Accurate Model (PCAM) for board implementation. The PCAM includes C code for all the HdS layers including routing, packeting, synchronization and bus transfer. The generated HdS methods provide a library of application level services to the C processes on individual SW cores. Therefore, the application developer does not need to write low level HdS for board implementation. Synthesis results for an multi-core MP3 decoder design, using ESE, show that the HdS is generated in order of seconds, compared to hours of manual coding. The quality of synthesized code is comparable to manually written code in terms of performance and code size.
Slides