Title | An Analytical Dynamic Scaling of Supply Voltage and Body Bias Exploiting Memory Stall Time Variation |
Author | *Jungsoo Kim, Younghoon Lee (KAIST, Republic of Korea), Sungjoo Yoo (POSTECH, Republic of Korea), Chong-Min Kyung (KAIST, Republic of Korea) |
Page | pp. 575 - 580 |
Detailed information (abstract, keywords, etc) | |
Slides |
Title | Bounded Potential Slack: Enabling Time Budgeting for Dual-Vt Allocation of Hierarchical Design |
Author | *Jun Seomun, Seungwhun Paik, Youngsoo Shin (KAIST, Republic of Korea) |
Page | pp. 581 - 586 |
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Slides |
Title | Dynamic Power Estimation for Deep Submicron Circuits with Process Variation |
Author | Quang Dinh, *Deming Chen, Martin Wong (UIUC, U.S.A.) |
Page | pp. 587 - 592 |
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Slides |
Title | Runtime Temperature-Based Power Estimation for Optimizing Throughput of Thermal-Constrained Multi-Core Processors |
Author | Dongkeun Oh, Nam Sung Kim, Yu Hen Hu (Univ. of Wisconsin, U.S.A.), *Charlie Chung Ping Chen (National Taiwan Univ., Taiwan), Azadeh Davoodi (Univ. of Wisconsin, U.S.A.) |
Page | pp. 593 - 599 |
Detailed information (abstract, keywords, etc) |