| Title | I-LUTSim: An Iterative Look-Up Table Based Thermal Simulator for 3-D ICs |
| Author | *Chi-Wen Pan, Yu-Min Lee (National Chiao Tung University, Taiwan), Pei-Yu Huang (Industrial Technology Research Institute, Taiwan), Chi-Ping Yang (National Chiao Tung University, Taiwan), Chang-Tzu Lin, Chia-Hsin Lee, Yung-Fa Chou, Ding-Ming Kwai (Industrial Technology Research Institute, Taiwan) |
| Page | pp. 151 - 156 |
| Keyword | 3-D, IC, Thermal, Simulator, Table |
| Abstract | This work presents an iterative look-up table based thermal simulator, I-LUTSim, to efficiently estimate the temperature profile of three-dimensional integrated circuits. I-LUTSim includes two stages. First, the pre-process stage constructs thermal impulse response tables. Then, the simulation stage iteratively calculates the temperature profile via the table lookup.
With this two-stage scheme, the maximum absolute error of I-LUTSim is less than 0.41% compared with that of a commercial tool ANSYS. Moreover, I-LUTSim is at least an order of magnitude faster than a fast matrix solver SuperLU for the full-chip temperature simulation. |
| Slides |
| Title | Compact Nonlinear Thermal Modeling of Packaged Integrated Systems |
| Author | *Zao Liu, Sheldon X.-D. Tan, Hai Wang (University of California, Riverside, U.S.A.), Ashish Gupta (Intel Corporation, U.S.A.), Sahana Swarup (University of California, Riverside, U.S.A.) |
| Page | pp. 157 - 162 |
| Keyword | Thermal modeling, Nonlinear, Subspace identification |
| Abstract | This paper proposes a new thermal nonlinear modeling technique for packaged integrated systems. Thermal behavior of
complicated systems like packaged electronic systems may
exhibit nonlinear and temperature dependent properties. As
a result, it is difficult to use a low order linear model to approximate the thermal behavior of the packaged integrated
systems without accuracy loss. In this paper, we try to
mitigate this problem by using piecewise linear (PWL) approach to characterizing the thermal behavior of those systems. The new method (called ThermSubPWL), which is
the first proposed approach to nonlinear thermal modeling
problem, identifies the linear local models for different temperature ranges using the subspace identification method.
A linear transformation method is proposed to transform
all the identified linear local models to the common state
basis to build the continuous piecewise linear model. Experimental results validate the proposed method on a realistic packaged integrated system modeled via the multidomain/physics commercial tool, COMSOL, under practical power signal inputs. The new piecewise models can lead
to much smaller model order without accuracy loss, which
translates to significant savings in both the simulation time
and the time required to identify the reduced models compared to applying the high order models. |
| Slides |
| Title | A Multilevel H-matrix-based Approximate Matrix Inversion Algorithm for Vectorless Power Grid Verification |
| Author | Wei Zhao, Yici Cai, *Jianlei Yang (Dept. of Computer Science and Technology, Tsinghua University, China) |
| Page | pp. 163 - 168 |
| Keyword | Power grid, Vectorless verification, H-matrix, Multilevel method |
| Abstract | Vectorless power grid verification technique makes it possible to estimate the worst-case voltage fluctuations of the on-chip power delivery network at the early design stage. For most of the existing vectorless verification algorithms, the sub¬problem of linear system solution which computes the inverse of the power grid matrix takes up a large part of the computation time and has become a critical bottleneck of the whole algorithm. In this paper, we propose a new algorithm that combines the H-matrix-based technique and the multilevel method to construct a data-sparse approximate inverse of the power grid matrix. Experimental results have shown that the proposed algorithm can obtain an almost linear complexity both in runtime and memory consumption for efficient vectorless power grid verification. |
| Slides |
| Title | Realization of Frequency-Domain Circuit Analysis Through Random Walk |
| Author | Tetsuro Miyakawa, Hiroshi Tsutsui, Hiroyuki Ochi, *Takashi Sato (Kyoto University, Japan) |
| Page | pp. 169 - 174 |
| Keyword | AC analysis, Random walk algorithm, Importance sampling, Incremental analysis |
| Abstract | This paper presents the realization of frequency-domain circuit analysis
based on random walk framework for the first time. In conventional random
walk based circuit analyses, the sample movement at a node is randomly
chosen to follow the edge probabilities. The probabilities are determined by
edge-admittances connecting to the node, which is impossible to apply for
the frequency-domain analysis because the probabilities are imaginary
numbers. By applying the idea of importance sampling, the intractable
imaginary probabilities are converted into real numbers while maintaining
the estimation correctness. Runtime acceleration through incremental
analysis is also proposed. |