Title | L-Shape Based Layout Fracturing for E-Beam Lithography |
Author | Bei Yu, Jhih-Rong Gao, *David Z. Pan (Univ. of Texas, Austin, U.S.A.) |
Page | pp. 249 - 254 |
Detailed information (abstract, keywords, etc) | |
Slides |
Title | High-throughput Electron Beam Direct Writing of VIA Layers by Character Projection using Character Sets Based on One-dimensional VIA Arrays with Area-efficient Stencil Design |
Author | *Rimon Ikeno (Univ. of Tokyo, Japan), Takashi Maruyama (e-Shuttle, Inc., Japan), Tetsuya Iizuka, Satoshi Komatsu, Makoto Ikeda, Kunihiro Asada (Univ. of Tokyo, Japan) |
Page | pp. 255 - 260 |
Detailed information (abstract, keywords, etc) | |
Slides |
Title | Linear Time Algorithm to Find All Relocation Positions for EUV Defect Mitigation |
Author | Yuelin Du (Univ. of Illinois, Urbana-Champaign, U.S.A.), Hongbo Zhang, Qiang Ma (Synopsys, Inc., U.S.A.), *Martin D. F. Wong (Univ. of Illinois, Urbana-Champaign, U.S.A.) |
Page | pp. 261 - 266 |
Detailed information (abstract, keywords, etc) | |
Slides |
Title | Self-Aligned Double and Quadruple Patterning-Aware Grid Routing with Hotspots Control |
Author | *Chikaaki Kodama (Toshiba Corp., Japan), Hirotaka Ichikawa (Toshiba Microelectronics Corp., Japan), Koichi Nakayama, Toshiya Kotani, Shigeki Nojima, Shoji Mimotogi, Shinji Miyamoto (Toshiba Corp., Japan), Atsushi Takahashi (Tokyo Inst. of Tech., Japan) |
Page | pp. 267 - 272 |
Detailed information (abstract, keywords, etc) | |
Slides |