Call for Papers
Call for Papers / Call for Designs in PDF format (160KB).
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Deadline for paper submission is strict this year.
Please see Preparation Guide for Technical Paper Submission.
Call for Papers ASP-DAC 2014
Aims of the Conference:
ASP-DAC 2014 is the nineteenth annual international conference on VLSI design automation in Asia and South Pacific region, one of the most active regions of design and fabrication of silicon chips in the world. The conference aims at providing the Asian and South Pacific CAD/DA and Design community with opportunities of presenting recent advances and with forums for future directions in technologies related to Electronic Design Automation (EDA). The format of the meeting intends to cultivate and promote an instructive and productive interchange of ideas among EDA researchers/developers and system/circuit/device designers. All scientists, engineers, and students who are interested in theoretical and practical aspects of VLSI design and design automation are welcomed to ASP-DAC.
Areas of Interest:
Original papers on, but not limited to, the following areas are invited.
Please note that ASP-DAC will work cooperatively with other
conferences and symposia in the field to check for double submissions.
[1] System-Level Modeling and Simulation/Verification:
System-level modeling, specification, language, performance analysis,
system-level simulation/verification, hardware-software
co-simulation/co-verification, etc.
[2] System-Level Synthesis and Optimization:
System-on-chip and multi-processor SoC (MPSoC) design methodology,
hardware-software partitioning, hardware-software co-design,
IP/platform-based design, application-specific instruction-set processor
(ASIP) synthesis, low power system design, etc.
[3] System-Level Memory/Communication Design and Networks on Chip:
Memory/cache optimization, Communication-based architecture design,
network-on-chip (NoC) design methodologies and CAD, interface
synthesis, system communication architecture, memory architecture,
low power communication design, etc.
[4] Embedded and Real-Time Systems:
Embedded system design, real-time system design, OS,
middleware. Compilation techniques, memory/cache optimization,
interfacing and software issues, with focuses on integration or
real-time properties to embedded systems. (Papers for general
optimizations in compilers and memory/cache/flash management schemes
may be moved to the more suitable subcommittees.)
[5] High-Level/Behavioral/Logic Synthesis and Optimization:
High-Level/behavioral/RTL synthesis, technology-independent
optimization, technology mapping, interaction between logic design
and layout, sequential and asynchronous logic synthesis, resource
scheduling, allocation, and synthesis.
[6] Validation and Verification for Behavioral/Logic Design:
Logic simulation, symbolic simulation, formal verification,
equivalence checking, transaction-level/RTL and gate-level modeling
and validation, assertion-based verification, coverage-analysis,
constrained-random testbench generation.
[7] Physical Design:
a. Partitioning, floorplanning, placement, buffer insertion,
interconnect planning, post-placement optimization, cell library
design, gate sizing, high-level physical design and synthesis.
b. Routing, clock network synthesis, post-routing optimization,
layout verification, package/PCB routing.
[8] Timing, Power, Thermal Analysis and Optimization:
Deterministic and statistical static timing analysis, statistical
performance analysis and optimization, low power design, power and
leakage analysis, power/ground and package analysis and optimization,
thermal analysis, etc.
[9] Signal/Power Integrity, Interconnect/Device/Circuit Modeling and Simulation:
Signal/power integrity, clock and bus analysis, interconnect and
substrate modeling/extraction, package modeling, device
modeling/simulation, circuit simulation, high-frequency and
electromagnetic simulation of circuits, etc.
[10] Design for Manufacturability/Yield and Statistical Design:
DFM, DFY, CAD support for OPC and RET, variability analysis, yield
analysis and optimization, reliability analysis, design for
resilience and robustness, cell library design, design fabrics, etc.
[11] Test and Design for Testability:
Testable design, fault modeling, ATPG, BIST and DFT, memory test and
repair, core and system test, delay test, analog and mixed signal
test.
[12] Analog, RF and Mixed Signal Design and CAD:
Analog/RF synthesis, analog layout, verification and simulation
techniques, noise analysis, mixed-signal design considerations.
[13] Emerging Technologies and Applications
a. EDA and Design Methodologies for Emerging Technologies:
Nanotechnology, quantum devices, emerging memory technologies,
molecular electronics, CNT, optical interconnect, 3D integration,
probabilistic computing, and spin logic.
b. Emerging Applications: Multimedia, consumer electronics,
communication, networking, sensor and sensor networks, ubiquitous
computing, biologically-inspired computing, microfluidics,
bioelectronics, and biomedical applications.
Submission of Papers:
Please read Preparation Guide for Technical Paper Submission carefully.
The key dates are as follows:
- Deadline for submission: 5 PM JST (UTC+9) July 10 (Wed), 2013
- Notification of acceptance: Sept. 11 (Wed.), 2013
- Deadline for final version: 5 PM JST (UTC+9) Nov. 11 (Mon), 2013
University LSI Design Contest:
ASP-DAC 2014 University LSI Design Contest encourages submitting
original papers on LSI design and implementation at universities and
other educational organizations.
(Please see Call for Designs.)
Panels, Special Sessions and Tutorials:
Suggestions and proposals are welcome and have to be addressed to the Conference Secretariat
(e-mail: aspdac2014-sec [at] mls.aspdac.com) no later than June 4 (Mon.), 2013.
Sponsors:
ACM SIGDA, IEEE CASS, IEEE CEDA, Singapore Chapter of IEEE CASS
ASP-DAC2014 Chairs:
General Co-Chairs:
Yong Lian and Yajun Ha (National Univ. of Singapore)
Technical Program Chair:
Nagisa Ishiura (Kwansei Gakuin Univ., Japan)
Technical Program Vice Chair:
Naehyuck Chang (Seoul National Univ., Korea)
Tulika Mitra (National Univ. of Singapore)
Contact:
Conference Secretariat: aspdac2014-sec [at] mls.aspdac.com
TPC Secretariat: aspdac2014-tpc [at] mls.aspdac.com