Supporter's Exhibition

Supporter's exhibition is held by four companies which support ASP-DAC 2015 and have exhibition booths. The supporter's exhibition is presented at International Conference Hall 1F Lobby from January 20 through January 22.

Exhibit Hours: 10:00 - 17:30, January 20
10:00 - 17:30, January 21
10:00 - 16:00, January 22
Location: International Conference Hall 1F Lobby

Cadence Design Systems
Cadence Design Systems, Japan
www.cadence.co.jp
System Design Enablement by Cadence Multi Domain/Language Simulation Platform Cadence Simulation Platform supports wide range of system design domains for automotive, medical, industrial and many more applications. Supported domains: SW/HW co-simulation, mixed digital/analog mixed design, electronics-mechanics coupled simulation, fault injection, thermal/power/noise analysis, etc. Supported languages: C/C++, SystemC, SystemVerilog, VHDL, Verilog, VHDL-AMS, Verilog-AMS and SPICE, etc.
NEC Corp.
NEC Corporation
www.nec.co.jp
CyberWorkBench has been developed by NEC over the course of twenty years. CyberWorkBench is a C-based LSI design platform developed around the All-in-C" paradigm that allows high level synthesis and verification of any ANSI-C or SystemC program generating high quality RTL. For more information, visit us at www.cyberworkbench.com
SH CONSULTING K.K.
SH CONSULTING K.K.
www.0pf.org
Open Processor Foundation (OPF): A public benefit nonprofit organization is dedicated to promote the universal freedom to create, distribute and modify microprocessor design.
Clean-Room Design: The first open source CPU core is called "J1 core" together with associated logic. 32/64bit J series processors leverage 20+ year old technologies and cutting edge design tools, process and methodologies. J series users can leverage software tools, OSes and applications accumulated over 20 years.
TOOL Corp.
TOOL Corp.
www.tool.co.jp
Showcased is LAVIS-plus that is a full-chip caliber IC design visualization system having electrical characteristics analysis, verification error display, and simple editing capabilities. LAVIS-plus also provides open APIs for facilitating its customization. The API enables you to use general syntax and libraries, so that you can easily create all sorts of scripts ranging from basic ones to advanced ones. Visit our booth and learn more about our EDA solutions.
ZUKEN Inc.
ZUKEN Inc.
www.zuken.co.jp
Zuken will exhibit at ASP-DAC their next generation EDA solution, CR-8000 Design Force. Design Force enables system-level co-design of the chip, package, and board with a native 3D database, and offers automated features to conduct upfront trade-off studies. Top-down and bottom-up flows can be managed with ease with Design Force by creating any simple or advanced hierarchical system structures to optimize IO connectivity and signal performance. Furthermore, Design Force is a new system developed for the latest hardware, software and 3D graphic technologies, so design teams can innovate with the highest performing and quality software, and reduce the product development time for any technology, including 2.5/3D IC, system-in-package (SiP), and embedding active devices within the substrate.
JEITA
JEITA EDA Technical Committee
www.jeita.or.jp
JEITA EDA Technical Committee is involved in promoting technologies and international standards related to the Electronic Design Automation (EDA) for designing semiconductor devices, electronic devices and systems, as a part of the activities of JEITA (the Japan Electronics and Information Technology Industries Association). At ASP-DAC2015, we show one of our standardization activities in IEEE, "P2401- Standard Format for LSI-Package-Board Interoperable Design." The general purpose of this standard is to develop a common format that LSI-Package-Board (LPB) design tools can use to exchange information/data seamlessly, as opposed to having to work with multiple different input and output formats. The format provides a common way to specify information/data about the project management, net lists, components, design rules, and geometries used in LSI-Package-Board (LPB) designs. For more information, please visit at http://www.jeita-edatc.com/ and http://standards.ieee.org/develop/project/2401.html
TOPPAN
TOPPAN PRINTING CO.,LTD.
www.toppan.co.jp
Toppan Technical Design Center Co., Ltd. (TDC) ,as a LSI designing partner for leading semiconductor manufacturers and as a Turnkey partner for electrical, industrial, and medical equipment manufacturers, has been providing a design and a development of LSI for over the past forty years. We provide a variety of LSI designing such as from logic to analog, from circuit to layout, from 28nm to 1um.We also provide Turnkey solutions to our customers with analog/mixed-signal design technology as our core competence. Our turnkey business is the one stop solution. We provide either simple shuttle service or a full service option that ranges from prototyping to production and includes selection of the optimum silicon foundry, support for packaging and testing, process management and quality assurance. Making use of our analog/mixed-signal LSI design know-how, we have had accumulated experience in sensing, data transfer, RF, power management and many other specialized IC applications.
Last Updated on: December 5, 2014