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Archive
Program at a glance
Keynote addresses
- Keynote
I: I Attended the Nineteenth Design Automation Conference
Chung-Laung Liu [Video] - Keynote II: Delivering 10X Design Improvements
Walden C. Rhines [Video] - Keynote III: IC Design for the Intuitive Life Style
Jim Lai [Video]
Special sessions
- 1D: Techniques for Efficient Energy Harvesting and Generation for Portable and Embedded Systems
- 2D: 3D Integration and Networks on Chips (Panel)
- 3D: Recent Advancement in Post-Silicon Validation
- 7D: Dependable Silicon Design with Unreliable Components
- 8D: ESL: Analysis and Synthesis of Multi-Core Systems
Designers' Forum
- 5D: Oral Session: State-of-the-art SoCs
- 6D: Tutorial and Panel Discussion: Is 3D Integration an Opportunity or Just a Hype?
- 9D: Oral Session: ESL, The Road to Glory, Or Is It Not? Real Stories about Using ESL Design Methodology in Product Development
- 10D: Oral Session: Embedded Software Development for Multi-Processor Systems-on-Chip
University LSI Design Contest
Technical Sessions
- 1A: Embedded Systems Design Techniques
- 1B: Advanced Model Order Reduction Technique
- 1C: Logic Synthesis
- 2A: Memory Management and Compiler Techniques
- 2B: Power and Signal Integrity
- 2C: System-level Simulation
- 3A: Emerging Memories and 3D ICs
- 3B: Macromodeling and Verification of Analog Systems
- 3C: System-level Modelling and Analysis
- 4A: New Techniques for Beyond-die Routing
- 4B: Analog Layout and Testing
- 4C: New Techniques in Technology Mapping
- 5A: Clock Network Analysis and Optimization
- 5B: Test Solutions for Emerging Applications
- 5C: Power, Performance and Reliability in SoC Design
- 6A: Advances in Modern Clock Tree Routing
- 6B: Timing-related Testing and Diagnosis
- 6C: Application-specific NoC Design
- 7A: Modern Floorplanning and Placement Techniques
- 7B: Power Optimization and Estimation in the DSM Era
- 7C: Design Verification and Debugging
- 8A: DFM1: Patterning and Physical Design
- 8B: Design and Verification for Process Variation Issues
- 8C: New Advances in High-level Synthesis
- 9A: DFM2: Variation Modeling
- 9B: Power Grid Analysis
- 9C: High-level Synthesis and Optimization for Performance and Power
- 10A: DFM3: Robust Design
- 10B: Emerging Circuits and Architectures
- 10C: System-level MPSoC Analysis and Optimization