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The 16th Asia and South Pacific Design Automation Conference

Session 5A  System-Level Simulation
Time: 13:40 - 15:40 Thursday, January 27, 2011
Location: Room 411+412
Chairs: Nagisa Ishiura (Kwansei Gakuin Univ., Japan), Bo-Cheng Charles Lai (National Chiao Tung Univ., Taiwan)

5A-1 (Time: 13:40 - 14:10)
TitleHandling Dynamic Frequency Changes in Statically Scheduled Cycle-Accurate Simulation
Author*Marius Gligor, Frédéric Pétrot (TIMA Laboratory, CNRS/INP Grenoble/UJF, France)
Pagepp. 407 - 412
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5A-2 (Time: 14:10 - 14:40)
TitleCoarse-grained Simulation Method for Performance Evaluation a of Shared Memory System
Author*Ryo Kawahara, Kenta Nakamura, Kouichi Ono, Takeo Nakada (IBM Research, Japan), Yoshifumi Sakamoto (Global Business Services, IBM Japan, Japan)
Pagepp. 413 - 418
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5A-3 (Time: 14:40 - 15:10)
TitleT-SPaCS – A Two-Level Single-Pass Cache Simulation Methodology
AuthorWei Zang, *Ann Gordon-Ross (Univ. of Florida, U.S.A.)
Pagepp. 419 - 424
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5A-4 (Time: 15:10 - 15:40)
TitleFast Data-Cache Modeling for Native Co-Simulation
Author*Héctor Posadas, Luis Diaz, Eugenio Villar (Univ. of Cantabria, Spain)
Pagepp. 425 - 430
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