| Title | (Invited Paper) An Overview of Spin-Based Integrated Circuits |
| Author | Wang Kang (University Beihang, China/IEF, Université Paris-Sud, France), *Weisheng Zhao, Zhaohao Wang, Jacques-Olivier Klein, Yue Zhang, Djaafar Chabi (IEF, Université Paris-Sud, France), Youguang Zhang (Univ. Beihang, China), Dafiné Ravelosona, Claude Chappert (IEF, Université Paris-Sud, France) |
| Page | pp. 676 - 683 |
| Keyword | non-volatile, fast speed, spintronics, low power |
| Abstract | Conventional CMOS integrated circuits suffer from serve power and scalability challenges as technology node scales into ultra-deep-micron technology nodes. Alternative approaches beyond charge-only based circuits. In particular, spin-based devices or integrated circuits show promising merits to overcome these issues by adding the spin freedom of electrons to the electronic circuits. Spintronics has now become a hot topic in both academics and industrials. This paper overviews the status and prospects of spin-based integrated circuits under intense investigation and address particularly their merits and challenges for practical applications. |
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| Title | (Invited Paper) Advances in Spintronics Devices for Microelectronics - from Spin-Transfer Torque to Spin-Orbit Torque |
| Author | *Shunsuke Fukami, Hideo Sato, Michihiko Yamanouchi, Shoji Ikeda, Fumihiro Matsukura, Hideo Ohno (Tohoku University, Japan) |
| Page | pp. 684 - 691 |
| Keyword | spintronics, spin-transfer torque, spin-orbit torque, magnetic random access memory, magnetic tunnel junction |
| Abstract | Recent advances in spintronics devices make it possible to open a new era of microelectronics. In this paper, we review the spintronics devices utilizing spin-transfer torques (STTs) and spin-orbit torques (SOTs) developed in recent years. The progresses of two-terminal STT device with CoFeB-MgO based magnetic tunnel junction (MTJ), three-terminal magnetic domain wall (DW) motion device with Co/Ni multilayer, and three-terminal SOT device with Cu-based channel are described. Integrated circuits with the developed spintronics devices are also reviewed. |
| Title | (Invited Paper) Hybrid CMOS/Magnetic Process Design Kit and SOT-Based Non-Volatile Standard Cell Architectures |
| Author | *Gregory Di Pendina, Kotb Jabeur, Guillaume Prenat (Spintec Laboratory, CEA-INAC/CNRS/UJF/G-INP, France) |
| Page | pp. 692 - 699 |
| Keyword | Spin Orbit Torque, Compact model, Standard Cell, Magnetic Random Access Memory, Process Design Kit |
| Abstract | This paper gives an overview of hybrid CMOS/magnetic logic circuit design. We describe the magnetic devices, the expected advantages of using them beside CMOS to help to circumvent the incoming limits of VLSI circuits and the tools required to design such circuits, including Process Design Kit (PDK) and Standard Cells (SC). As a case of study, we particularly focus on a new and promising device technology based on Spin Orbit Torque (SOT) effect. |
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| Title | (Invited Paper) Architectural Aspects in Design and Analysis of SOT-Based Memories |
| Author | Rajendra Bishnoi, Mojtaba Ebrahimi, Fabian Oboril, *Mehdi Tahoori (Karlsruhe Institute of Technology, Germany) |
| Page | pp. 700 - 707 |
| Keyword | Spin Orbit Torqe, non-volatile memory, magnetic memory, design space exploration, cache |
| Abstract | Magnetic Random Access Memory (MRAM) and in particular SOT-MRAM is a promising emerging memory technology because of its various advantages. In this work, we provide an analysis of SOT-MRAM at circuit- and architecture-level, and compare SOT-MRAM with several other technologies. Our architecture-level analysis shows that a hybrid-combination of SRAM and SOT-MRAM for the L1- and L2-cache, respectively, can significantly reduce area and energy while the performance slightly increases. |
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