LSI Univ. Design Contest

The University LSI Design Contest is a key event of ASP-DAC, which focuses on real chip designs in academia. The Design Contest Committee selected 12 designs for presentation, from which winners of design awards will be announced in the conference.

  • Date: Mon., January 22, 2008
  • Place:
    • Oral Presentation: Room311BC (10:15-12:20)
    • Poster Presentation: Room 321A (12:20-13:30) (Light meals will be served.)
  • Chair: In-Cheol Park (KAIST, Korea)
Session No. Time Presentation Title
1D-1 10:15 - 10:22 A 1.2GHz Delayed Clock Generator for High-speed Microprocessors
Inhwa Jung, Moo-Young Kim, and Chulwoo Kim (Korea Univ., Korea)
1D-2 10:22 - 10:29 LVDS-type On-Chip Transmission Line Interconnect with Passive Equalizers in 90 nm CMOS Process
Akiko Mineyama, Hiroyuki Ito, Takahiro Ishii, Kenichi Okada, and Kazuya Masu (Tokyo Inst. of Technology, Japan)
1D-3 10:29 - 10:36 A Low-Leakage Current Power 180-nm CMOS SRAM
Tadayoshi Enomoto and Yuki Higuchi (Chuo Univ., Japan)
1D-5 10:43 - 10:50 A CMOS Direct Sampling Mixer using Switched Capacitor Filter Technique for Software-Defined Radio
Hong Phuc Ninh, Takashi Moue, Takashi Kurashina, Kenichi Okada, and Akira Matsuzawa (Tokyo Inst. of Technology, Japan)
1D-6 10:50 - 10:57 Small-Area CMOS RF Distributed Mixer using Multi-Port Inductors
Susumu Sadoshima, Satoshi Fukuda, Tackya Yammouch, Hiroyuki Ito, Kenichi Okada, and Kazuya Masu (Tokyo Inst. of Technology, Japan)
1D-7 10:57 - 11:04 Dynamic Supply Noise Measurement Circuit Composed of Standard Cells Suitable for In-Site SoC Power Integrity Verification
Yasuhiro Ogasahara, Masanori Hashimoto, and Takao Onoye (Osaka Univ.,Japan)
1D-8 11:04 - 11:11 Duo-Binary Circular Turbo Decoder Based on Border Metric Encoding for WiMAX
Ji-Hoon Kim and In-Cheol Park (KAIST, Korea)
1D-9 11:11 - 11:18 Area and Power Efficient Design of Coarse Time Synchronizer and Frequency Offset Estimator for Fixed WiMAX Systems
Tae-Hwan Kim and In-Cheol Park (KAIST, Korea)
1D-10 11:18 - 11:25 A Low-Cost Cryptographic Processor for Security Embeded System
Ronghua Lu, Jun Han, Xiaoyang Zeng, Qing Li, Lang Mai, and Zhao Jia (Fudan Univ., China)
1D-11 11:25 - 11:32 Multithreaded Coprocessor Interface for Multi-Core Multimedia SoC
Shih Hao Ou, Tay Jyi Lin, Xiang Sheng Deng, Zhi Hong Zhuo, and Chih Wei Liu (NatĄŻl Chiao Tung Univ., Taiwan)
1D-12 11:32 - 11:39 Parameterized Embedded In-circuit Emulator and Its Retargetable Debugging Software for Microprocessor/Microcontroller/DSP Processor
Liang-Bi Chen, Yung-Chih Liu, Chien-Hung Chen, Chung-Fu Kao, and Ing-Jer Huang (NatĄŻl Sun Yat-Sen Univ., Taiwan)
Last Updated on: January 1, 2008