| Title | (Invited Paper) Advanced System LSIs for Home 3D System |
| Author | Takao Suzuki (Panasonic Corp., Japan) |
| Page | pp. 749 - 754 |
| Abstract | The progress of digital video processing technology and LSI technology have been the driving force behind the creation of 3D systems, and various 3D products for the home were released. 2010 became a historic year for in-home 3D. We developed a suite of system LSIs that was the key to realizing home 3D systems by applying integrated platform for digital CE, the UniPhier (Universal Platform for High-quality Image Enhancing Revolution). The system LSIs for 3D TV deliver high display speeds, and the main system LSI for 3D Blu-ray provides MPEG-4 MVC decoding. This paper describes the 3D technologies, home 3D systems and advanced system LSIs for the consumer market. |
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| Title | (Invited Paper) Development of Low Power and High Performance Application Processor (T6G) for Multimedia Mobile Applications |
| Author | Yoshiyuki Kitasho, Yu Kikuchi, Takayoshi Shimazawa, Yasuo Ohara, Masafumi Takahashi, Yoshio Masubuchi, Yukihito Oowaki (Toshiba Corporation Semiconductor Company, Japan) |
| Page | pp. 755 - 759 |
| Abstract | TOSHIBA has developed a mobile application processor for multimedia mobile applications in 40 nm with a H.264 full high-definition (full-HD) video engine and a video/audio multiprocessor for various CODECs and image processing. The application processor has 25 power domains to achieve coarse-grain power gating for adjusting to the required performance of wide range of multimedia applications. Furthermore, the application processor has Stacked Chip SoC (SCS) DRAM I/F to achieve high memory bandwidth with low power consumption. |
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| Title | (Invited Paper) Design Constraint of Fine Grain Supply Voltage Control LSI |
| Author | Atsuki Inoue (Fujitsu Labs., Japan) |
| Page | pp. 760 - 765 |
| Abstract | A supply voltage control technique for realizing low power LSI is utilized not only for general purpose processors, but also for custom ASIC thanks to advanced LSI design environments. Fine grain supply voltage control in time domain in power gating and DVFS scheme are seen as promising techniques to reduce power consumption. However, they require additional energy consumption for control themselves. In this paper, we discuss energy consumption including this overhead using simple circuit model and make it clear that charging energy of power supply line limits the minimum sleep duration or cycles as design constraint. |
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| Title | (Invited Paper) FPGA Prototyping using Behavioral Synthesis for Improving Video Processing Algorithm and FHD TV SoC Design |
| Author | Masaru Takahashi (SoC Software Platform Division, Renesas Electronics Corporation, Japan) |
| Page | pp. 766 - 769 |
| Abstract | The System on Chip (SoC) can include Full High Definition (FHD) video processing, however the turn around time of algorithm improvement have been long. We provide the new method utilizing the behavioral synthesis. Therefore, the turn around time of the algorithm improvement and hardware implementation can be shorten. |
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| Title | (Invited Paper) An RTL-to-GDS2 Design Methodology for Advanced System LSI |
| Author | Nobuyuki Nishiguchi (Semiconductor Technology Academic Research Center, Japan) |
| Page | pp. 770 - 774 |
| Abstract | STARC is developing an RTL-to-GDS2 design methodology for 32nm (and 28nm) system LSIs called STARCAD-CEL. The design methodology focuses on four key areas: low power design, variation aware design and design for manufacturability as well as design productivity. This paper examines several techniques we used to solve issues the in design of challenging, leading edge devices. It also describes the effectiveness of the STARCAD-CEL design methodology when applied to the four key areas. |
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