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The 16th Asia and South Pacific Design Automation Conference

Session 9B  Emerging Solutions in Scan Testing
Time: 16:00 - 18:00 Friday, January 28, 2011
Location: Room 413
Chairs: Seiji Kajihara (Kyusyu Inst. of Tech., Japan), Ting Ting Hwang (National Tsing Hua Univ., Taiwan)

9B-1 (Time: 16:00 - 16:30)
TitleFault Simulation and Test Generation for Clock Delay Faults
Author*Yoshinobu Higami, Hiroshi Takahashi, Shin-ya Kobayashi (Ehime Univ., Japan), Kewal K. Saluja (Univ. of Wisconsin-Madison, U.S.A.)
Pagepp. 799 - 805
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9B-2 (Time: 16:30 - 17:00)
TitleCompression-Aware Capture Power Reduction for At-Speed Testing
Author*Jia Li (Tsinghua Univ., China), Qiang Xu (Chinese Univ. of Hong Kong, Hong Kong), Dong Xiang (Tsinghua Univ., China)
Pagepp. 806 - 811
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9B-3 (Time: 17:00 - 17:30)
TitleFault Diagnosis Aware ATE Assisted Test Response Compaction
AuthorJoseph Howard, *Sudhakar M Reddy (Univ. of Iowa, U.S.A.), Irith Pomeranz (Purdue Univ., U.S.A.), Bernd Becker (Univ. of Freiburg, Germany)
Pagepp. 812 - 817
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9B-4 (Time: 17:30 - 18:00)
TitleSecure Scan Design Using Shift Register Equivalents against Differential Behavior Attack
Author*Hideo Fujiwara (NAIST, Japan), Katsuya Fujiwara, Hideo Tamamoto (Akita Univ., Japan)
Pagepp. 818 - 823
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