Keynote Addresses
Opening and Keynote I : Tuesday, January 20, 8:30-10:00, Small Auditorium, 5F
"Challenges to EDA System from the View Point of Processor Design and Technology Drivers"
- Mitsuo Saito (Chief Fellow and VP of Engineering, Toshiba Corporation Semiconductor Company, Japan)

Keynote II : Wednesday, January 21, 9:00-10:00, Small Auditorium, 5F
"Automated Synthesis and Verification of Embedded Systems: Wishful Thinking or Reality?"
- Wolfgang Rosenstiel (Professor, Chair for Computer Engineering and Director, Wilhelm-Schickard-Institute for Informatics, University of Tuebingen, Germany)

Keynote III : Thursday, January 22, 9:00-10:00, Small Auditorium, 5F
"From Restrictive to Prescriptive Design"
- Leon Stok (Director, Electronic Design Automation, IBM Systems and Technology Group, United States)

Special Sessions
1D : Tuesday, January 20, 10:15-12:20, Room 416+417
Presentation + Poster Discussion: "University LSI Design Contest"

2D : Tuesday, January 20, 13:30-15:35, Room 416+417
Invited Talks: "EDA Acceleration Using New Architectures"
Organizer: Damir A. Jamsok (IBM Corp., United States)

3D : Tuesday, January 20, 15:55-18:00, Room 416+417
Invited Talks: "Hardware Dependent Software for Multi- and Many-Core Embedded Systems"

4D : Wednesday, January 21, 10:15-12:20, Room 416+417
Invited Talks: "Challenges in 3D Integrated Circuit Design"

9D : Thursday, January 22, 15:55-18:00, Room 416+417
Invited Talks + Panel Discussion: "Dependable VLSI: Device, Design and Architecture - How should they cooperate ?-"
Organizer: Shuichi Sakai (Univ. of Tokyo, Japan)
Panelists: Hidetoshi Onodera (Kyoto Univ., Japan)
Hiroto Yasuura (Kyushu Univ., Japan)
James Hoe (Carnegie Mellon Univ., United States)

Designers' Forum
5D : Wednesday, January 21, 13:30-15:35, Small Auditorium, 5F
Invited Talks: "Consumer SoCs"

6D : Wednesday, January 21, 15:55-18:00, Small Auditorium, 5F
Panel Discussion: "ESL Design Methods"
Moderator: Takashi Hasegawa (Fujitsu Microelectronics Ltd., Japan)
Panelists: Simon Bloch (Mentor Graphics Corp., United States)
Ahmed Jerraya (CEA-LETI, France)
Gabriela Nicolescu (Ecole Polytechnique de Montreal, Canada)
Shigeru Oho (Hitachi, Ltd., Japan)
Koichiro Yamashita (Fujitsu Labs. Ltd., Japan)

7D : Thursday, January 22, 10:15-12:20, Small Auditorium, 5F
Invited Talks: "Analog/RF Circuit Designs"

8D : Thursday, January 22, 13:30-15:35, Small Auditorium, 5F
Panel Discussion: "Near-Future SoC Architectures - Can Dynamically Reconfigurable Processors be a Key Technology?"
Moderator: Hideharu Amano (Keio Univ., Japan)
Panelists: Toru Awashima (NEC, Japan)
Hisanori Fujisawa (Fujitsu Labs. Ltd., Japan)
Naohiko Irie (Hitachi Ltd., Japan)
Takashi Miyamori (Toshiba Corp., Japan)
Tony Stansfield (Panasonic Europe Ltd., Great Britain)

Tutorial 1 (Full Day) : Monday, January 19, 9:30-17:00, Room 411+412
Software Development and Programming of Multicore LSI

Tutorial 2 (Half Day) : Monday, January 19, 9:30-12:30, Room 413
Formal Methods for C-Based Embedded System Design Verification - Technical Trends and Practical Aspects -

Tutorial 3 (Half Day) : Monday, January 19, 9:30-12:30, Room 414+415
Statistical Design on the Verge of Maturity: Revisiting the Foundation

Tutorial 4, 5 (Two Half Days) : Monday, January 19, 9:30-12:30 and 14:00-17:00, Room 416+417
Circuit Reliability: Modeling, Simulation, and Resilient Design Solutions
  Section I (morning): Reliability Mechanisms and the Impact on IC Design
  Section II (afternoon): Circuit Aging Prediction and Resilient Design

Tutorial 6 (Half Day) : Monday, January 19, 14:00-17:00, Room 414+415
Recent Advances in Low-Leakage VLSI Design

Tutorial 7 (Half Day) : Monday, January 19, 14:00-17:00, Room 413
Memory Architectures and Software Transformations for System Level Design

Last Updated on: 10 30, 2008