(Back to Session Schedule)

The 18th Asia and South Pacific Design Automation Conference

Session 3B  System-Level Synthesis and Optimization
Time: 16:00 - 18:00 Wednesday, January 23, 2013
Chairs: Antoine Trouve (ISIT, Japan), Farhad Mehdipour (Kyushu Univ., Japan)

3B-1 (Time: 16:00 - 16:30)
TitleOptimal Partition with Block-Level Parallelization in C-to-RTL Synthesis for Streaming Applications
Author*Shuangchen Li, Yongpan Liu (Tsinghua Univ., China), X.Sharon Hu (Univ. of Notre Dame, U.S.A.), Xinyu He, Yining Zhang (Tsinghua Univ., China), Pei Zhang (Y Explorations Inc., U.S.A.), Huazhong Yang (Tsinghua Univ., China)
Pagepp. 225 - 230
Detailed information (abstract, keywords, etc)

3B-2 (Time: 16:30 - 17:00)
TitleMulti-Mode Pipelined MPSoCs for Streaming Applications
Author*Haris Javaid, Daniel Witono, Sri Parameswaran (Univ. of New South Wales, Australia)
Pagepp. 231 - 236
Detailed information (abstract, keywords, etc)

3B-3 (Time: 17:00 - 17:30)
TitleNetwork Simplex Method Based Multiple Voltage Scheduling in Power-Efficient High-Level Synthesis
Author*Cong Hao, Song Chen, Takeshi Yoshimura (Waseda Univ., Japan)
Pagepp. 237 - 242
Detailed information (abstract, keywords, etc)

3B-4 (Time: 17:30 - 18:00)
TitleVISA Synthesis: Variation-Aware Instruction Set Architecture Synthesis
Author*Yuko Hara-Azumi (NAIST, Japan), Takuya Azumi (Ritsumeikan Univ., Japan), Nikil Dutt (Univ. of California, Irvine, U.S.A.)
Pagepp. 243 - 248
Detailed information (abstract, keywords, etc)