The 24th Asia and South Pacific Design Automation Conference
Technical Program

Remark: The presenter of each paper is marked with "*".

Technical Program: SIMPLE version DETAILED version with abstract

Author Index: HERE

Session Schedule

Tuesday, January 22, 2019

Room Saturn	Room Uranus	Room Venus	Room Mars+Room Mercury
1K (Miraikan Hall) Opening & Keynote I 9:00 - 10:30
Coffee Break 10:30 - 10:45
1A University Design Contest 10:45 - 12:00	1B Real-time Embedded Software 10:45 - 12:00	1C Hardware and System Security 10:45 - 12:00	1D Thermal- and Power-Aware Design and Optimization 10:45 - 12:00
Lunch Break / University LSI Design Contest Poster Presentation (Room Jupiter) 12:00 - 13:30
2A (SS-1) Reverse Engineering: growing more mature – and facing powerful countermeasures 13:30 - 15:35	2B All about PIM 13:30 - 15:35	2C Design for Reliability 13:30 - 15:35	2D New Advances in Emerging Computing Paradigms 13:30 - 15:35
Coffee Break 15:35 - 15:55
3A (SS-2) Design, testing, and fault tolerance of Neuromorphic systems 15:55 - 17:10	3B Memory-Centric Design and Synthesis 15:55 - 17:10	3C Efficient Modeling of Analog, Mixed Signal and Arithmetic Circuits 15:55 - 17:10	3D Logic and Precision Optimization for Neural Network Designs 15:55 - 17:10
ACM SIGDA Student Research Forum at ASP-DAC 2019 (Room Jupiter) 18:00 - 20:00

Wednesday, January 23, 2019

Room Saturn	Room Uranus	Room Venus	Room Mars+Room Mercury
2K (Miraikan Hall) Keynote II 9:00 - 10:00
Coffee Break 10:00 - 10:20
4A (SS-3) Modern Mask Optimization: From Shallow To Deep Learning 10:20 - 12:00	4B System Level Modelling Methods I 10:20 - 12:00	4C Testing and Design for Security 10:20 - 12:00	4D Network-Centric Design and System 10:20 - 12:00
Lunch Break / Supporters' Session (Miraikan Hall) 12:00 - 13:50
5A (DF-1) Robotics: From System Design to Application 13:50 - 15:05	5B Advanced Memory Systems 13:50 - 15:05	5C Learning: Make Patterning Light and Right 13:50 - 15:05	5D Design and CAD for Emerging Memories 13:50 - 15:05
Coffee Break 15:05 - 15:25
6A (DF-2) Advanced Imaging Technologies and Applications 15:35 - 17:15	6B Optimized Training for Neural Networks 15:35 - 16:50	6C New Trends in Biochips 15:35 - 16:50	6D Power-efficient Machine Learning Hardware Design 15:35 - 16:50
Banquet (Hilton Tokyo Odaiba, "Orion") 18:30 - 20:30

Thursday, January 24, 2019

Room Saturn	Room Uranus	Room Venus	Room Mars+Room Mercury
3K (Miraikan Hall) Keynote III 9:00 - 10:00
Coffee Break 10:00 - 10:20
7A (SS-4) Security of Machine Learning and Machine Learning for Security: Progress and Challenges for Secure, Machine Intelligent Mobile Systems 10:20 - 12:00	7B System Level Modelling Methods II 10:20 - 12:00	7C Placement 10:20 - 12:00	7D Algorithms and Architectures for Emerging Applications 10:20 - 12:00
Lunch Break 12:00 - 13:15
8A (DF-3) Emerging Technologies for Tokyo Olympic 2020 13:15 - 14:30	8B Embedded Software for Parallel Architecture 13:15 - 14:30	8C Machine Learning and Hardware Security 13:15 - 14:30	8D Memory Architecture for Efficient Neural Network Computing 13:15 - 14:30
Coffee Break 14:30 - 14:50
9A (DF-4) Beyond the Virtual Reality World 14:50 - 16:05	9B Logic-Level Security and Synthesis 14:50 - 16:05	9C Analysis and Algorithms for Digital Design Verification 14:50 - 16:05	9D FPGA and Optics-Based Neural Network Designs 14:50 - 16:05
Coffee Break 16:05 - 16:25
10A (SS-5) The Resurgence of Reconfigurable Computing in the Post Moore Era 16:25 - 17:40	10B Hardware Acceleration 16:25 - 17:40	10C Routing 16:25 - 17:40

DF: Designers' Forum, SS: Special Session

List of papers

Remark: The presenter of each paper is marked with "*".

Tuesday, January 22, 2019

[To Session Table]

Session 1K Opening & Keynote I
Time: 9:00 - 10:30 Tuesday, January 22, 2019
Location: Miraikan Hall
Chair: Toshiyuki Shibuya (Fujitsu Labs., Japan)

1K-1 (Time: 9:30 - 10:30)

Title	(Keynote Address) Development trend of artificial intelligence technology and its application in the field of robotics
Author	Tao Zhang (Tsinghua Univ., China)
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 1A University Design Contest
Time: 10:45 - 12:00 Tuesday, January 22, 2019
Location: Room Saturn
Chairs: Kousuke Miyaji (Shinshu Univ., Japan), Akira Tsuchiya (Univ. of Shiga Prefecture, Japan)

Best Design Award
1A-1 (Time: 10:45 - 10:48)

Title	A Wide Conversion Ratio, 92.8% Efficiency, 3-Level Buck Converter with Adaptive On/Off-Time Control and Shared Charge Pump Intermediate Voltage Regulator
Author	*Kousuke Miyaji, Yuki Karasawa, Takanobu Fukuoka (Shinshu Univ., Japan)
Page	pp. 1 - 2
Detailed information (abstract, keywords, etc)

Special Feature Award
1A-2 (Time: 10:48 - 10:51)

Title	A Three-Dimensional Millimeter-Wave Frequency-Shift Based CMOS Biosensor using Vertically Stacked Spiral Inductors in LC Oscillators
Author	*Maya Matsunaga, Taiki Nakanishi, Atsuki Kobayashi (Nagoya Univ., Japan), Kiichi Niitsu (Nagoya Univ./JST PRESTO, Japan)
Page	pp. 3 - 4
Detailed information (abstract, keywords, etc)
Slides

Special Feature Award
1A-3 (Time: 10:51 - 10:54)

Title	Design of 385 x 385 µm² 0.165V 270pW Fully-Integrated Supply-Modulated OOK Transmitter in 65nm CMOS for Glasses-Free, Self-Powered, and Fuel-Cell-Embedded Continuous Glucose Monitoring Contact Lens
Author	*Kenya Hayashi, Shigeki Arata, Ge Xu, Shunya Murakami, Cong Dang Bui, Takuyoshi Doike, Maya Matsunaga, Atsuki Kobayashi, Kiichi Niitsu (Nagoya Univ., Japan)
Page	pp. 5 - 6
Detailed information (abstract, keywords, etc)
Slides

1A-4 (Time: 10:54 - 10:57)

Title	2D Optical Imaging Using Photosystem I Photosensor Platform with 32×32 CMOS Biosensor Array
Author	*Kiichi Niitsu, Taichi Sakabe (Nagoya Univ., Japan), Mariko Miyachi, Yoshinori Yamanoi, Hiroshi Nishihara (Univ. of Tokyo, Japan), Tatsuya Tomo (Tokyo Univ. of Science, Japan), Kazuo Nakazato (Nagoya Univ., Japan)
Page	pp. 7 - 8
Detailed information (abstract, keywords, etc)

1A-5 (Time: 10:57 - 11:00)

Title	Design of Gate-Leakage-Based Timer Using an Amplifier-Less Replica-Bias Switching Technique in 55-nm DDC CMOS
Author	*Atsuki Kobayashi, Yuya Nishio, Kenya Hayashi, Shigeki Arata (Nagoya Univ., Japan), Kiichi Niitsu (Nagoya Univ./JST PRESTO, Japan)
Page	pp. 9 - 10
Detailed information (abstract, keywords, etc)
Slides

1A-6 (Time: 11:00 - 11:03)

Title	A Low-Voltage CMOS Electrophoresis IC Using Electroless Gold Plating for Small-Form-Factor Biomolecule Manipulation
Author	*Kiichi Niitsu, Yuuki Yamaji, Atsuki Kobayashi, Kazuo Nakazato (Nagoya Univ., Japan)
Page	pp. 11 - 12
Detailed information (abstract, keywords, etc)
Slides

1A-7 (Time: 11:03 - 11:06)

Title	A Low-Voltage Low-Power Multi-Channel Neural Interface IC Using Level-Shifted Feedback Technology
Author	*Liangjian Lyu, Yu Wang (Fudan Univ., China), Chixiao Chen, C. -J. Richard Shi (Univ. of Washington, U.S.A.)
Page	pp. 13 - 14
Detailed information (abstract, keywords, etc)
Slides

1A-8 (Time: 11:06 - 11:09)

Title	Development of a High Stability, Low Standby Power Six-Transistor CMOS SRAM Employing a Single Power Supply
Author	*Nobuaki Kobayashi (Nihon Univ., Japan), Tadayoshi Enomoto (Chuo Univ., Japan)
Page	pp. 15 - 16
Detailed information (abstract, keywords, etc)
Slides

1A-9 (Time: 11:09 - 11:12)

Title	Design of Heterogeneously-integrated Memory System with Storage Class Memories and NAND Flash Memories
Author	*Chihiro Matsui, Ken Takeuchi (Chuo Univ., Japan)
Page	pp. 17 - 18
Detailed information (abstract, keywords, etc)

1A-10 (Time: 11:12 - 11:15)

Title	A 65-nm CMOS Fully-Integrated Circulating Tumor Cell and Exosome Analyzer Using an On-Chip Vector Network Analyzer and a Transmission-Line-Based Detection Window
Author	Taiki Nakanishi, Maya Matsunaga, Shunya Murakami, Atsuki Kobayashi, *Kiichi Niitsu (Nagoya Univ., Japan)
Page	pp. 19 - 20
Detailed information (abstract, keywords, etc)
Slides

1A-11 (Time: 11:15 - 11:18)

Title	Low Standby Power CMOS Delay Flip-Flop with Data Retention Capability
Author	*Nobuaki Kobayashi (Nihon Univ., Japan), Tadayoshi Enomoto (Chuo Univ., Japan)
Page	pp. 21 - 22
Detailed information (abstract, keywords, etc)
Slides

1A-12 (Time: 11:18 - 11:21)

Title	Accelerate Pattern Recognition for Cyber Security Analysis
Author	*Mohammad Tahghighi, Wei Zhang (Hong Kong Univ. of Science and Tech., Hong Kong)
Page	pp. 23 - 24
Detailed information (abstract, keywords, etc)
Slides

1A-13 (Time: 11:21 - 11:24)

Title	FPGA Laboratory System supporting Power Measurement for Low-Power Digital Design
Author	Marco Winzker, *Andrea Schwandt (Bonn-Rhein-Sieg Univ., Germany)
Page	pp. 25 - 26
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 1B Real-time Embedded Software
Time: 10:45 - 12:00 Tuesday, January 22, 2019
Location: Room Uranus
Chairs: Zhaoyan Shen (Shandong Univ.), Zebo Peng (Linköping Univ., Sweden)

1B-1 (Time: 10:45 - 11:10)

Title	Towards Limiting the Impact of Timing Anomalies in Complex Real-Time Processors
Author	*Pedro Benedicte (Barcelona Supercomputing Center and Univ. Politècnica de Catalunya, Spain), Jaume Abella, Carles Hernandez, Enrico Mezzetti (Barcelona Supercomputing Center, Spain), Francisco J. Cazorla (Barcelona Supercomputing Center and IIIA-CSIC, Spain)
Page	pp. 27 - 32
Detailed information (abstract, keywords, etc)
Slides

1B-2 (Time: 11:10 - 11:35)

Title	SeRoHAL: Generation of Selectively Robust Hardware Abstraction Layers for Efficient Protection of Mixed-criticality Systems
Author	*Petra R. Kleeberger, Juana Rivera, Daniel Mueller-Gritschneder, Ulf Schlichtmann (Tech. Univ. München, Germany)
Page	pp. 33 - 38
Detailed information (abstract, keywords, etc)
Slides

1B-3 (Time: 11:35 - 12:00)

Title	Partitioned and Overhead-Aware Scheduling of Mixed-Criticality Real-Time Systems
Author	*Yuanbin Zhou, Soheil Samii, Petru Eles, Zebo Peng (Linköping Univ., Sweden)
Page	pp. 39 - 44
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 1C Hardware and System Security
Time: 10:45 - 12:00 Tuesday, January 22, 2019
Location: Room Venus
Chairs: Ray C.C. Cheung (City Univ. of Hong Kong, Hong Kong), Hai Zhou (Northwestern Univ., U.S.A.)

1C-1 (Time: 10:45 - 11:10)

Title	Layout Recognition Attacks on Split Manufacturing
Author	*Wenbin Xu, Lang Feng, Jeyavijayan Rajendran, Jiang Hu (Texas A&M Univ., U.S.A.)
Page	pp. 45 - 50
Detailed information (abstract, keywords, etc)
Slides

1C-2 (Time: 11:10 - 11:35)

Title	Execution of Provably Secure Assays on MEDA Biochips to Thwart Attacks
Author	*Tung-Che Liang (Duke Univ., U.S.A.), Mohammed Shayan (New York Univ., U.S.A.), Krishnendu Chakrabarty (Duke Univ., U.S.A.), Ramesh Karri (New York Univ., U.S.A.)
Page	pp. 51 - 57
Detailed information (abstract, keywords, etc)
Slides

1C-3 (Time: 11:35 - 12:00)

Title	TAD: Time Side-Channel Attack Defense of Obfuscated Source Code
Author	*Alexander Fell, Hung Thinh Pham, Siew Kei Lam (Nanyang Technological Univ., Singapore)
Page	pp. 58 - 63
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 1D Thermal- and Power-Aware Design and Optimization
Time: 10:45 - 12:00 Tuesday, January 22, 2019
Location: Room Mars+Room Mercury
Chairs: Hussam Amrouch (Karlsruhe Inst. of Tech. (KIT), Germany), Jiang Hu (Texas A&M)

Best Paper Candidate
1D-1 (Time: 10:45 - 11:10)

Title	Leakage-Aware Thermal Management for Multi-Core Systems Using Piecewise Linear Model Based Predictive Control
Author	Xingxing Guo, *Hai Wang, Chi Zhang, He Tang, Yuan Yuan (Univ. of Electronic Science and Tech. of China, China)
Page	pp. 64 - 69
Detailed information (abstract, keywords, etc)
Slides

1D-2 (Time: 11:10 - 11:35)

Title	Multi-Angle Bended Heat Pipe Design Using X-Architecture Routing with Dynamic Thermal Weight on Mobile Devices
Author	Hsuan-Hsuan Hsiao, *Hong-Wen Chiou, Yu-Min Lee (National Chiao Tung Univ., Taiwan)
Page	pp. 70 - 75
Detailed information (abstract, keywords, etc)
Slides

1D-3 (Time: 11:35 - 12:00)

Title	Fully-automated Synthesis of Power Management Controllers from UPF
Author	*Dustin Peterson, Oliver Bringmann (Univ. of Tuebingen, Germany)
Page	pp. 76 - 81
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 2A (SS-1) Reverse Engineering: growing more mature – and facing powerful countermeasures
Time: 13:30 - 15:35 Tuesday, January 22, 2019
Location: Room Saturn
Chair: Naehyuck Chang (KAIST, Republic of Korea)

2A-1 (Time: 13:30 - 13:55)

Title	(Invited Paper) Integrated Flow for Reverse Engineering of Nanoscale Technologies
Author	*Bernhard Lippmann, Aayush Singla, Niklas Unverricht, Peter Egger, Anja Dübotzky, Michael Werner (Infineon Technologies AG, Germany), Horst Gieser (Fraunhofer EMFT, Germany), Martin Rasche, Oliver Kellermann (Raith GmbH, Germany), Helmut Gräb (TUM, Germany)
Page	pp. 82 - 89
Detailed information (abstract, keywords, etc)

2A-2 (Time: 13:55 - 14:20)

Title	(Invited Paper) NETA: When IP Fails, Secrets Leak
Author	Travis Meade, Jason Portillo, Shaojie Zhang (Univ. of Central Florida, U.S.A.), *Yier Jin (Univ. of Florida, U.S.A.)
Page	pp. 90 - 95
Detailed information (abstract, keywords, etc)

2A-3 (Time: 14:20 - 14:45)

Title	(Invited Paper) Machine Learning and Structural Characteristics for Reverse Engineering
Author	*Johanna Baehr, Alessandro Bernardini, Georg Sigl, Ulf Schlichtmann (Tech. Univ. of Munich, Germany)
Page	pp. 96 - 103
Detailed information (abstract, keywords, etc)
Slides

2A-4 (Time: 14:45 - 15:10)

Title	(Invited Paper) Towards Cognitive Obfuscation: Impeding Hardware Reverse Engineering Based on Psychological Insights
Author	*Carina Wiesen, Steffen Becker, Nils Albartus, Max Hoffmann, Sebastian Wallat, Marc Fyrbiak, Nikol Rummel, Christof Paar (Ruhr Univ. Bochum, Germany)
Page	pp. 104 - 111
Detailed information (abstract, keywords, etc)

2A-5 (Time: 15:10 - 15:35)

Title	(Invited Paper) Insights to the Mind of a Trojan Designer: The Challenge to Integrate a Trojan in the Bitstream
Author	*Maik Ender, Paul Martin Knopp, Christof Paar, Pawel Swierczynski, Sebastian Wallert, Matthias Wilhelm (Ruhr Univ. Bochum, Germany)
Page	pp. 112 - 119
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 2B All about PIM
Time: 13:30 - 15:35 Tuesday, January 22, 2019
Location: Room Uranus
Chairs: Guangyu Sun (Peking Univ., China), Wanli Chang (Univ. of York, U.K.)

Best Paper Award
2B-1 (Time: 13:30 - 13:55)

Title	GraphSAR: A Sparsity-Aware Processing-in-Memory Architecture for Large-Scale Graph Processing on ReRAMs
Author	*Guohao Dai (Tsinghua Univ., China), Tianhao Huang (Massachusetts Inst. of Tech., U.S.A.), Yu Wang, Huazhong Yang (Tsinghua Univ., China), John Wawrzynek (Univ. of California, Berkeley, U.S.A.)
Page	pp. 120 - 126
Detailed information (abstract, keywords, etc)
Slides

2B-2 (Time: 13:55 - 14:20)

Title	ParaPIM: A Parallel Processing-in-Memory Accelerator for Binary-Weight Deep Neural Networks
Author	Shaahin Angizi, Zhezhi He, *Deliang Fan (Univ. of Central Florida, U.S.A.)
Page	pp. 127 - 132
Detailed information (abstract, keywords, etc)
Slides

2B-3 (Time: 14:20 - 14:45)

Title	CompRRAE: RRAM-based Convolutional Neural Network Accelerator with Reduced Computations through a Runtime Activation Estimation
Author	*Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui (Hong Kong Univ. of Science and Tech., Hong Kong)
Page	pp. 133 - 139
Detailed information (abstract, keywords, etc)

2B-4 (Time: 14:45 - 15:10)

Title	CuckooPIM: An Efficient and Less-blocking Coherence Mechanism for Processing-in-Memory Systems
Author	*Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xiaowei Li (Chinese Academy of Sciences, China)
Page	pp. 140 - 145
Detailed information (abstract, keywords, etc)

2B-5 (Time: 15:10 - 15:35)

Title	AERIS: Area/Energy-Efficient 1T2R ReRAM Based Processing-in-Memory Neural Network System-on-a-Chip
Author	*Jinshan Yue, Yongpan Liu, Fang Su (Tsinghua Univ., China), Shuangchen Li (Univ. of California, Santa Barbara, U.S.A.), Zhe Yuan, Zhibo Wang, Wenyu Sun, Xueqing Li, Huazhong Yang (Tsinghua Univ., China)
Page	pp. 146 - 151
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 2C Design for Reliability
Time: 13:30 - 15:35 Tuesday, January 22, 2019
Location: Room Venus
Chairs: Shigeki Nojima (Toshiba Memory, Japan), Bei Yu (Chinese Univ. of Hong Kong, Hong Kong)

2C-1 (Time: 13:30 - 13:55)

Title	IR-ATA: IR Annotated Timing Analysis, A Flow for Closing the LoopBetween PDN design, IR Analysis & Timing Closure
Author	Ashkan Vakil, Houman Homayoun, *Avesta Sasan (George Mason Univ., U.S.A.)
Page	pp. 152 - 159
Detailed information (abstract, keywords, etc)

2C-2 (Time: 13:55 - 14:20)

Title	Learning-Based Prediction of Package Power Delivery Network Quality
Author	Yi Cao (Qualcomm Technologies, U.S.A.), *Andrew B. Kahng (UC San Diego, U.S.A.), Joseph Li, Abinash Roy, Vaishnav Srinivas (Qualcomm Technologies, U.S.A.), Bangqi Xu (UC San Diego, U.S.A.)
Page	pp. 160 - 166
Detailed information (abstract, keywords, etc)
Slides

2C-3 (Time: 14:20 - 14:45)

Title	Tackling Signal Electromigration with Learning-Based Detection and Multistage Mitigation
Author	*Wei Ye, Mohamed Baker Alawieh, Yibo Lin, David Z. Pan (Univ. of Texas, Austin, U.S.A.)
Page	pp. 167 - 172
Detailed information (abstract, keywords, etc)
Slides

2C-4 (Time: 14:45 - 15:10)

Title	ROBIN: Incremental Oblique Interleaved ECC for Reliability Improvement in STT-MRAM Caches
Author	*Elham Cheshmikhani (Sharif Univ. of Tech., Iran), Hamed Farbeh (Amirkabir Univ. of Tech., Iran), Hossein Asadi (Sharif Univ. of Tech., Iran)
Page	pp. 173 - 178
Detailed information (abstract, keywords, etc)
Slides

2C-5 (Time: 15:10 - 15:35)

Title	Aging-aware Chip Health Prediction Adopting an Innovative Monitoring Strategy
Author	Yun-Ting Wang (National Tsing Hua Univ., Taiwan), Kai-Chiang Wu (National Chiao Tung Univ., Taiwan), *Chung-Han Chou (Feng Chia Univ., Taiwan), Shih-Chieh Chang (National Tsing Hua Univ., Taiwan)
Page	pp. 179 - 184
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 2D New Advances in Emerging Computing Paradigms
Time: 13:30 - 15:35 Tuesday, January 22, 2019
Location: Room Mars+Room Mercury
Chairs: Shigeru Yamashita (Ritsumeikan Univ., Japan), Xiaoming Chen (Chinese Academy of Sciences, China)

2D-1 (Time: 13:30 - 13:55)

Title	Compiling SU(4) Quantum Circuits to IBM QX Architectures
Author	*Alwin Zulehner, Robert Wille (Johannes Kepler Univ. Linz, Austria)
Page	pp. 185 - 190
Detailed information (abstract, keywords, etc)
Slides

2D-2 (Time: 13:55 - 14:20)

Title	Quantum Circuit Compilers Using Gate Commutation Rules
Author	*Toshinari Itoko, Rudy Raymond, Takashi Imamichi, Atsushi Matsuo (IBM Research, Japan), Andrew W. Cross (IBM Research, U.S.A.)
Page	pp. 191 - 196
Detailed information (abstract, keywords, etc)
Slides

2D-3 (Time: 14:20 - 14:45)

Title	Scalable Design for Field-coupled Nanocomputing Circuits
Author	*Marcel Walter (Univ. of Bremen, Germany), Robert Wille (Johannes Kepler Univ. Linz, Austria), Frank Sill Torres (DFKI GmbH, Germany), Daniel Große, Rolf Drechsler (Univ. of Bremen, Germany)
Page	pp. 197 - 202
Detailed information (abstract, keywords, etc)
Slides

2D-4 (Time: 14:45 - 15:10)

Title	BDD-based Synthesis of Optical Logic Circuits Exploiting Wavelenngth Division Multiplexing
Author	*Ryosuke Matsuo, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera (Kyoto Univ., Japan), Akihiko Shinya, Masaya Notomi (NTT, Japan)
Page	pp. 203 - 209
Detailed information (abstract, keywords, etc)
Slides

2D-5 (Time: 15:10 - 15:35)

Title	Hybrid Binary-Unary Hardware Accelerator
Author	S. Rasoul Faraji, *Kia Bazargan (Univ. of Minnesota, U.S.A.)
Page	pp. 210 - 215
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 3A (SS-2) Design, testing, and fault tolerance of Neuromorphic systems
Time: 15:55 - 17:10 Tuesday, January 22, 2019
Location: Room Saturn
Chair: Chenchen Liu (Clarkson Univ., U.S.A.)

3A-1 (Time: 15:55 - 16:20)

Title	(Invited Paper) Fault Tolerance in Neuromorphic Computing Systems
Author	*Yu Wang (Tsinghua Univ., China), Mengyun Liu, Krishnendu Chakrabarty (Duke Univ., U.S.A.), Lixue Xia (Tsinghua Univ., China)
Page	pp. 216 - 223
Detailed information (abstract, keywords, etc)
Slides

3A-2 (Time: 16:20 - 16:45)

Title	(Invited Paper) Build Reliable and Efficient Neuromorphic Design with Memristor Technology
Author	Bing Li, Bonan Yan (Duke Univ., U.S.A.), Chenchen Liu (Clarkson Univ., U.S.A.), *Hai Li (Duke Univ., U.S.A.)
Page	pp. 224 - 229
Detailed information (abstract, keywords, etc)

3A-3 (Time: 16:45 - 17:10)

Title	(Invited Paper) Reliable In-Memory Neuromorphic Computing Using Spintronics
Author	Christopher Muench, Rajendra Bishnoi, *Mehdi Tahoori (KIT, Germany)
Page	pp. 230 - 236
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 3B Memory-Centric Design and Synthesis
Time: 15:55 - 17:10 Tuesday, January 22, 2019
Location: Room Uranus
Chair: Tohru Ishihara (Nagoya Univ.)

Best Paper Candidate
3B-1 (Time: 15:55 - 16:20)

Title	A Staircase Structure for Scalable and Efficient Synthesis of Memristor-Aided Logic
Author	*Alwin Zulehner (Johannes Kepler Univ. Linz, Austria), Kamalika Datta (National Inst. of Tech. Meghalaya, India), Indranil Sengupta (Indian Inst. of Tech. Kharagpur, India), Robert Wille (Johannes Kepler Univ. Linz, Austria)
Page	pp. 237 - 242
Detailed information (abstract, keywords, etc)

3B-2 (Time: 16:20 - 16:45)

Title	On-chip Memory Optimization for High-level Synthesis of Multi-dimensional Data on FPGA
Author	Daewoo Kim, Sugil Lee, *Jongeun Lee (Ulsan National Inst. of Science and Tech., Republic of Korea)
Page	pp. 243 - 248
Detailed information (abstract, keywords, etc)

3B-3 (Time: 16:45 - 17:10)

Title	HUBPA: High Utilization Bidirectional Pipeline Architecture for Neuromorphic Computing
Author	Houxiang Ji, *Li Jiang, Tianjian Li, Naifeng Jing, Jing Ke, Xiaoyao Liang (Shanghai Jiao Tong Univ., China)
Page	pp. 249 - 254
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 3C Efficient Modeling of Analog, Mixed Signal and Arithmetic Circuits
Time: 15:55 - 17:10 Tuesday, January 22, 2019
Location: Room Venus
Chairs: Jun Tao (Fudan Univ., China), Shobha Vasudevan (Univ. of Illinois, Urbana-Champaign, U.S.A.)

3C-1 (Time: 15:55 - 16:20)

Title	Efficient Sparsification of Dense Circuit Matrices in Model Order Reduction
Author	*Charalampos Antoniadis, Nestor Evmorfopoulos, Georgios Stamoulis (Univ. of Thessaly, Greece)
Page	pp. 255 - 260
Detailed information (abstract, keywords, etc)
Slides

3C-2 (Time: 16:20 - 16:45)

Title	Spectral Approach to Verifying Non-linear Arithmetic Circuits
Author	Cunxi Yu (EPFL, Switzerland), Tiankai Su, Atif Yasin, *Maciej Ciesielski (UMass Amherst, U.S.A.)
Page	pp. 261 - 267
Detailed information (abstract, keywords, etc)
Slides

3C-3 (Time: 16:45 - 17:10)

Title	S²-PM: Semi-Supervised Learning for Efﬁcient Performance Modeling of Analog and Mixed Signal Circuits
Author	Mohamed Baker Alawieh, Xiyuan Tang, *David Z. Pan (Univ. of Texas, Austin, U.S.A.)
Page	pp. 268 - 273
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 3D Logic and Precision Optimization for Neural Network Designs
Time: 15:55 - 17:10 Tuesday, January 22, 2019
Location: Room Mars+Room Mercury
Chairs: Massanori Muroyama (Tohoku Univ., Japan), Younghyun Kim (Univ. of Wisconsin, U.S.A.)

Best Paper Award
3D-1 (Time: 15:55 - 16:20)

Title	Energy-Efficient, Low-Latency Realization of Neural Networks through Boolean Logic Minimization
Author	Mahdi Nazemi, Ghasem Pasandi, *Massoud Pedram (USC, U.S.A.)
Page	pp. 274 - 279
Detailed information (abstract, keywords, etc)
Slides

3D-2 (Time: 16:20 - 16:45)

Title	Log-Quantized Stochastic Computing for Memory and Computation Efficient DNNs
Author	*Hyeonuk Sim, Jongeun Lee (Ulsan National Inst. of Science and Tech., Republic of Korea)
Page	pp. 280 - 285
Detailed information (abstract, keywords, etc)
Slides

3D-3 (Time: 16:45 - 17:10)

Title	Cell Division: Weight Bit-Width Reduction Technique for Convolutional Neural Network Hardware Accelerators
Author	*Hanmin Park, Kiyoung Choi (Seoul National Univ., Republic of Korea)
Page	pp. 286 - 291
Detailed information (abstract, keywords, etc)
Slides

Wednesday, January 23, 2019

[To Session Table]

Session 2K Keynote II
Time: 9:00 - 10:00 Wednesday, January 23, 2019
Location: Miraikan Hall
Chair: Hidetoshi Onodera (Kyoto Univ., Japan)

2K-1 (Time: 9:00 - 10:00)

Title	(Keynote Address) Post-K: A Game-changing Supercomputer with Groundbreaking A64fx High Performance Arm Processor
Author	Satoshi Matsuoka (RIKEN, Japan)
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 4A (SS-3) Modern Mask Optimization: From Shallow To Deep Learning
Time: 10:20 - 12:00 Wednesday, January 23, 2019
Location: Room Saturn
Chairs: Evangeline F. Y. Young (Chinese Univ. of Hong Kong, Hong Kong), Atsushi Takahashi (Tokyo Inst. of Tech., Japan)

4A-1 (Time: 10:20 - 10:45)

Title	(Invited Paper) LithoROC: Lithography Hotspot Detection with Explicit ROC Optimization
Author	*Wei Ye, Yibo Lin, Meng Li, Qiang Liu, David Z. Pan (Univ. of Texas, Austin, U.S.A.)
Page	pp. 292 - 298
Detailed information (abstract, keywords, etc)
Slides

4A-2 (Time: 10:45 - 11:10)

Title	(Invited Paper) Detecting Multi-Layer Layout Hotspots with Adaptive Squish Patterns
Author	*Haoyu Yang (Chinese Univ. of Hong Kong, Hong Kong), Piyush Pathak, Frank Gennari, Ya-Chieh Lai (Cadence Design Systems, U.S.A.), Bei Yu (Chinese Univ. of Hong Kong, Hong Kong)
Page	pp. 299 - 304
Detailed information (abstract, keywords, etc)
Slides

4A-3 (Time: 11:10 - 11:35)

Title	(Invited Paper) A Local Optimal Method on DSA Guiding Template Assignment with Redundant/Dummy Via Insertion
Author	*Xingquan Li (Fuzhou Univ., China), Bei Yu (Chinese Univ. of Hong Kong, Hong Kong), Jianli Chen, Wenxing Zhu (Fuzhou Univ., China)
Page	pp. 305 - 310
Detailed information (abstract, keywords, etc)

4A-4 (Time: 11:35 - 12:00)

Title	(Invited Paper) Deep Learning-Based Framework for Comprehensive Mask Optimization
Author	Bo-Yi Yu, *Yong Zhong, Shao-Yun Fang, Hung-Fei Kuo (National Taiwan Univ. of Science and Tech., Taiwan)
Page	pp. 311 - 316
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 4B System Level Modelling Methods I
Time: 10:20 - 12:00 Wednesday, January 23, 2019
Location: Room Uranus
Chairs: Yoshinori Takeuchi (Kindai Univ.), Sri Parameswaran (Univ. of New South Wales)

4B-1 (Time: 10:20 - 10:45)

Title	AxDNN:Towards the Cross-layer Design of Approximate DNNs
Author	*Yinghui Fan, Xiaoxi Wu, Jiying Dong, Zhi Qi (Southeast Univ., China)
Page	pp. 317 - 322
Detailed information (abstract, keywords, etc)

4B-2 (Time: 10:45 - 11:10)

Title	Simulate-the-hardware: Training Accurate Binarized Neural Networks for Low-Precision Neural Accelerators
Author	*Jiajun Li (Univ. of Chinese Academy of Sciences/Chinese Academy of Sciences, China), Ying Wang (Chinese Academy of Sciences, China), Bosheng Liu (Univ. of Chinese Academy of Sciences/Chinese Academy of Sciences, China), Yinhe Han, Xiaowei Li (Chinese Academy of Sciences, China)
Page	pp. 323 - 328
Detailed information (abstract, keywords, etc)
Slides

4B-3 (Time: 11:10 - 11:35)

Title	An N-Way Group Association Architecture and Sparse Data Group Association Load Balancing Algorithm for Sparse CNN Accelerators
Author	*Jingyu Wang, Zhe Yuan, Ruoyang Liu, Huazhong Yang, Yongpan Liu (Tsinghua Univ., China)
Page	pp. 329 - 334
Detailed information (abstract, keywords, etc)
Slides

4B-4 (Time: 11:35 - 12:00)

Title	Maximizing Power State Cross Coverage in Firmware-based Power Management
Author	*Vladimir Herdt, Hoang M. Le (Univ. of Bremen, Germany), Daniel Große, Rolf Drechsler (Univ. of Bremen, DFKI GmbH, Germany)
Page	pp. 335 - 340
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 4C Testing and Design for Security
Time: 10:20 - 12:00 Wednesday, January 23, 2019
Location: Room Venus
Chairs: Michihiro Shintani (NAIST, Japan), Kohei Miyase (Kyushu Inst. of Tech., Japan)

4C-1 (Time: 10:20 - 10:45)

Title	Improving Scan Chain Diagnostic Accuracy Using Multi-Stage Artificial Neural Networks
Author	Mason Chern, Shih-Wei Lee, *Shi-Yu Huang (National Tsing Hua Univ., Taiwan), Yu Huang, Gaurav Veda, Kun-Han Tsia, Wu-Tung Cheng (Mentor, A Siemens Business, U.S.A.)
Page	pp. 341 - 346
Detailed information (abstract, keywords, etc)

4C-2 (Time: 10:45 - 11:10)

Title	Testing Stuck-Open Faults of Priority Address Encoder in Content Addressable Memories
Author	*Tsai-Ling Tsai, Jin-Fu Li (National Central Univ., Taiwan), Chun-Lung Hsu, Chi-Tien Sun (ITRI, Taiwan)
Page	pp. 347 - 351
Detailed information (abstract, keywords, etc)

4C-3 (Time: 11:10 - 11:35)

Title	ScanSAT: Unlocking Obfuscated Scan Chains
Author	*Lilas Alrahis (Khalifa Univ., United Arab Emirates), Muhammad Yasin (Tandon school of engineering, New York university, U.S.A.), Hani Saleh, Baker Mohammad, Mahmoud Al-Qutayri (Khalifa Univ., United Arab Emirates), Ozgur Sinanoglu (New York Univ. Abu Dhabi, United Arab Emirates)
Page	pp. 352 - 357
Detailed information (abstract, keywords, etc)
Slides

4C-4 (Time: 11:35 - 12:00)

Title	CycSAT-Unresolvable Cyclic Logic Encryption Using Unreachable States
Author	Amin Rezaei, You Li, Yuanqi Shen, Shuyu Kong, *Hai Zhou (Northwestern Univ., U.S.A.)
Page	pp. 358 - 363
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 4D Network-Centric Design and System
Time: 10:20 - 12:00 Wednesday, January 23, 2019
Location: Room Mars+Room Mercury
Chairs: Keiji Kimura (Waseda Univ., Japan), Yaoyao Ye (Shanghai Jiao Tong Univ., China)

Best Paper Candidate
4D-1 (Time: 10:20 - 10:45)

Title	Routing in Optical Network-on-Chip: Minimizing Contention with Guaranteed Thermal Reliability
Author	*Mengquan Li (Chongqing Univ., China), Weichen Liu (Nanyang Technological Univ., Singapore), Lei Yang, Peng Chen, Duo Liu (Chongqing Univ., China), Nan Guan (Hong Kong Polytechnic Univ., Hong Kong)
Page	pp. 364 - 369
Detailed information (abstract, keywords, etc)
Slides

4D-2 (Time: 10:45 - 11:10)

Title	Bidirectional Tuning of Microring-Based Silicon Photonic Transceivers for Optimal Energy Efficiency
Author	*Yuyang Wang (Univ. of California, Santa Barbara, U.S.A.), M. Ashkan Seyedi, Jared Hulme, Marco Fiorentino, Raymond G. Beausoleil (Hewlett Packard Labs, U.S.A.), Kwang-Ting Cheng (Hong Kong Univ. of Science and Tech., Hong Kong)
Page	pp. 370 - 375
Detailed information (abstract, keywords, etc)
Slides

4D-3 (Time: 11:10 - 11:35)

Title	Redeeming Chip-level Power Efficiency by Collaborative Management of the Computation and Communication
Author	*Ning Lin, Hang Lu, Xin Wei, Xiaowei Li (Chinese Academy of Sciences/Univ. of Chinese Academy of Sciences, China)
Page	pp. 376 - 381
Detailed information (abstract, keywords, etc)

4D-4 (Time: 11:35 - 12:00)

Title	A High-Level Modeling and Simulation Approach Using Test-Driven Cellular Automata for Fast Performance Analysis of RTL NoC Designs
Author	*Moon Gi Seok (Arizona State Univ., U.S.A.), Daejin Park (Kyungpook National Univ., Republic of Korea), Hessam S. Sarjoughian (Arizona State Univ., U.S.A.)
Page	pp. 382 - 387
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 5A (DF-1) Robotics: From System Design to Application
Time: 13:50 - 15:05 Wednesday, January 23, 2019
Location: Room Saturn
Organizer: Koji Inoue (Kyushu Univ., Japan), Organizer/Chair: Yuji Ishikawa (Toshiba Device & Storage, Japan)

5A-1 (Time: 13:50 - 14:15)

Title	(Designers' Forum) Computer-Aided Support System for Minimally Invasive Surgery Using 3D Organ Shape Models
Author	Ken'ichi Morooka (Kyusyu Univ., Japan)
Detailed information (abstract, keywords, etc)

5A-2 (Time: 14:15 - 14:40)

Title	(Designers' Forum) ROS and mROS: How to accelerate the development of robot systems and integrate embedded devices
Author	Hideki Takase (Kyoto Univ./JST PRESTO, Japan)
Detailed information (abstract, keywords, etc)

5A-3 (Time: 14:40 - 15:05)

Title	(Designers' Forum) Rapid Development of Robotics technology using Robot Contest and Open Collaboration
Author	Masaki Yamamoto (AI Solution Center, Panasonic, Japan)
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 5B Advanced Memory Systems
Time: 13:50 - 15:05 Wednesday, January 23, 2019
Location: Room Uranus
Chairs: Jaehyun Park (Univ. of Ulsan, Republic of Korea), Chenchen Liu (Clarkson Univ.)

5B-1 (Time: 13:50 - 14:15)

Title	A Sharing-Aware L1.5D Cache for Data Reuse in GPGPUs
Author	*Jianfei Wang, Li Jiang, Jing Ke, Xiaoyao Liang, Naifeng Jing (Shanghai Jiao Tong Univ., China)
Page	pp. 388 - 393
Detailed information (abstract, keywords, etc)
Slides

5B-2 (Time: 14:15 - 14:40)

Title	NeuralHMC: An Efficient HMC-Based Accelerator for Deep Neural Networks
Author	Chuhan Min (Univ. of Pittsburgh, U.S.A.), Jiachen Mao, Hai Li, *Yiran Chen (Duke Univ., U.S.A.)
Page	pp. 394 - 399
Detailed information (abstract, keywords, etc)

5B-3 (Time: 14:40 - 15:05)

Title	Boosting Chipkill Capability under Retention-Error Induced Reliability Emergency
Author	Xianwei Zhang (AMD, U.S.A.), Rujia Wang, *Youtao Zhang, Jun Yang (Univ. of Pittsburgh, U.S.A.)
Page	pp. 400 - 405
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 5C Learning: Make Patterning Light and Right
Time: 13:50 - 15:05 Wednesday, January 23, 2019
Location: Room Venus
Chairs: Tetsuaki Matsunawa (Toshiba Memory), Hidetoshi Matsuoka (Fujitsu Labs.)

Best Paper Candidate
5C-1 (Time: 13:50 - 14:15)

Title	SRAF Insertion via Supervised Dictionary Learning
Author	*Hao Geng, Haoyu Yang, Yuzhe Ma (Chinese Univ. of Hong Kong, Hong Kong), Joydeep Mitra (Cadence, U.S.A.), Bei Yu (Chinese Univ. of Hong Kong, Hong Kong)
Page	pp. 406 - 411
Detailed information (abstract, keywords, etc)
Slides

5C-2 (Time: 14:15 - 14:40)

Title	A Fast Machine Learning-based Mask Printability Predictor for OPC Acceleration
Author	*Bentian Jiang (Chinese Univ. of Hong Kong, Hong Kong), Hang Zhang (Cornell Univ., U.S.A.), Jinglei Yang (Univ. of California, Santa Barbara, U.S.A.), Evangeline F. Y. Young (Chinese Univ. of Hong Kong, Hong Kong)
Page	pp. 412 - 419
Detailed information (abstract, keywords, etc)
Slides

5C-3 (Time: 14:40 - 15:05)

Title	Semi-Supervised Hotspot Detection with Self-Paced Multi-Task Learning
Author	Ying Chen (Chinese Academy of Sciences/Univ. of Chinese Academy of Sciences, China), Yibo Lin (Univ. of Texas, Austin, U.S.A.), Tianyang Gai (Chinese Academy of Sciences/Univ. of Chinese Academy of Sciences, China), Yajuan Su (Chinese Academy of Sciences, China), Yayi Wei (Chinese Academy of Sciences/Univ. of Chinese Academy of Sciences, China), *David Z. Pan (Univ. of Texas, Austin, U.S.A.)
Page	pp. 420 - 425
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 5D Design and CAD for Emerging Memories
Time: 13:50 - 15:05 Wednesday, January 23, 2019
Location: Room Mars+Room Mercury
Chairs: Li Jiang (Shanghai Jiao Tong Univ., China), Takao Marukame (Toshiba Corporate Research & Development Center, Japan)

5D-1 (Time: 13:50 - 14:15)

Title	Exploring emerging CNFET for Efficient Last Level Cache Design
Author	Dawen Xu, *Li Li (Hefei Univ. of Tech., China), Ying Wang, Cheng Liu, Huawei Li (Chinese Academy of Sciences, China)
Page	pp. 426 - 431
Detailed information (abstract, keywords, etc)

5D-2 (Time: 14:15 - 14:40)

Title	Mosaic: An Automated Synthesis Flow for Boolean Logic Based on Memristor Crossbar
Author	*Lei Xie (Southeast Univ., China)
Page	pp. 432 - 437
Detailed information (abstract, keywords, etc)
Slides

Best Paper Candidate
5D-3 (Time: 14:40 - 15:05)

Title	Handling Stuck-at-faults in Memristor Crossbar Arrays using Matrix Transformations
Author	Baogang Zhang, Necati Uysal, Deliang Fan, *Rickard Ewetz (Univ. of Central Florida, U.S.A.)
Page	pp. 438 - 443
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 6A (DF-2) Advanced Imaging Technologies and Applications
Time: 15:35 - 17:15 Wednesday, January 23, 2019
Location: Room Saturn
Organizer: Masaki Sakakibara (Sony Semiconductor Solutions, Japan), Organizer/Chair: Shinichi Shibahara (Renesas Electronics, Japan)

6A-1 (Time: 15:35 - 16:00)

Title	(Designers' Forum) NIR Lock-in Pixel Image Sensors for Remote Heart Rate Detection
Author	Shoji Kawahito, Cao Chen, Leyi Tan, Keiichiro Kagawa, Keita Yasutomi (Shizuoka Univ., Japan), Norimichi Tsumura (Chiba Univ., Japan)
Detailed information (abstract, keywords, etc)

6A-2 (Time: 16:00 - 16:25)

Title	(Designers' Forum) A TDC/ADC Hybrid LiDAR SoC for 200m Range Detection with High Image Resolution under 100klux Sunlight
Author	Kentaro Yoshioka (Toshiba, Japan)
Detailed information (abstract, keywords, etc)

6A-3 (Time: 16:25 - 16:50)

Title	(Designers' Forum) A 1/4-inch 3.9Mpixel Low Power Event-driven Back-illuminated Stacked CMOS Image sensor
Author	Oichi Kumagai (Sony Semiconductor Solutions, Japan)
Detailed information (abstract, keywords, etc)

6A-4 (Time: 16:50 - 17:15)

Title	(Designers' Forum) Next-Generation Fundus Camera with Full-Color Image Acquisition in 0-lx Visible Light using BSI CMOS Image Sensor with Advanced NIR Multi-Spectral Imaging System -Application Field Development of Dynamic Intelligent Systems Using High-Speed Vision-
Author	Hirofumi Sumi, Hironari Takehara (NAIST, Japan), Norimasa Kishi (Univ. of Tokyo, Japan), Jun Ohta (NAIST, Japan), Masatoshi Ishikawa (Univ. of Tokyo, Japan)
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 6B Optimized Training for Neural Networks
Time: 15:35 - 16:50 Wednesday, January 23, 2019
Location: Room Uranus
Chairs: Deliang Fan (Univ. of Central Florida, U.S.A.), Raymond (Ruirui) Huang (Alibaba Cloud, U.S.A.)

6B-1 (Time: 15:35 - 16:00)

Title	CAPTOR: A Class Adaptive Filter Pruning Framework for Convolutional Neural Networks in Mobile Applications
Author	*Zhuwei Qin, Fuxun Yu (George Mason Univ., U.S.A.), ChenChen Liu (Clarkson Univ., U.S.A.), Xiang Chen (George Mason Univ., U.S.A.)
Page	pp. 444 - 449
Detailed information (abstract, keywords, etc)
Slides

6B-2 (Time: 16:00 - 16:25)

Title	TNPU: An Efficient Accelerator Architecture for Training Convolutional Neural Networks
Author	*Jiajun Li, Guihai Yan, Wenyan Lu, Shuhao Jiang, Shijun Gong, Jingya Wu, Junchao Yan, Xiaowei Li (Chinese Academy of Sciences, China)
Page	pp. 450 - 455
Detailed information (abstract, keywords, etc)
Slides

6B-3 (Time: 16:25 - 16:50)

Title	REIN: A Robust Training Method for Enhancing Generalization Ability of Neural Networks in Autonomous Driving Systems
Author	*Fuxun Yu (George Mason Univ., U.S.A.), Chenchen Liu (Clarkson Univ., U.S.A.), Xiang Chen (George Mason Univ., U.S.A.)
Page	pp. 456 - 461
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 6C New Trends in Biochips
Time: 15:35 - 16:50 Wednesday, January 23, 2019
Location: Room Venus
Chair: Tsun-Ming Tseng (Tech. Univ. of Munich, Germany)

6C-1 (Time: 15:35 - 16:00)

Title	Factorization Based Dilution of Biochemical Fluids with Micro-Electrode-Dot-Array Biochips
Author	Sohini Saha (IIEST, Shibpur, India), Debraj Kundu, *Sudip Roy (IIT Roorkee, India), Sukanta Bhattacharjee (New York Univ., United Arab Emirates), Krishnendu Chakrabarty (Duke Univ., U.S.A.), Partha P. Chakrabarti (IIT Kharagpur, India), Bhargab B. Bhattacharya (ISI Kolkata, India)
Page	pp. 462 - 467
Detailed information (abstract, keywords, etc)
Slides

6C-2 (Time: 16:00 - 16:25)

Title	Sample Preparation for Multiple-Reactant Bioassays on Micro-Electrode-Dot-Array Biochips
Author	*Tung-Che Liang (Duke Univ., U.S.A.), Yun-Sheng Chan (National Chiao Tung Univ., Taiwan), Tsung-Yi Ho (National Tsing Hua Univ., Taiwan), Krishnendu Chakrabarty (Duke Univ., U.S.A.), Chen-Yi Lee (National Chiao Tung Univ., Taiwan)
Page	pp. 468 - 473
Detailed information (abstract, keywords, etc)
Slides

6C-3 (Time: 16:25 - 16:50)

Title	Robust Sample Preparation on Low-Cost Digital Microfluidic Biochips
Author	*Zhanwei Zhong (Duke Univ., U.S.A.), Robert Wille (Johannes Kepler Univ. Linz, Austria), Krishnendu Chakrabarty (Duke Univ., U.S.A.)
Page	pp. 474 - 480
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 6D Power-efficient Machine Learning Hardware Design
Time: 15:35 - 16:50 Wednesday, January 23, 2019
Location: Room Mars+Room Mercury
Chairs: Hai Wang (UESTC, China), Sheldon Tan (Univ. of California, Riverside, U.S.A.)

6D-1 (Time: 15:35 - 16:00)

Title	SAADI: A Scalable Accuracy Approximate Divider for Dynamic Energy-Quality Scaling
Author	Setareh Behroozi, Jingjie Li, Jackson Melchert, *Younghyun Kim (Univ. of Wisconsin-Madison, U.S.A.)
Page	pp. 481 - 486
Detailed information (abstract, keywords, etc)
Slides

6D-2 (Time: 16:00 - 16:25)

Title	SeFAct: Selective Feature Activation and Early Classification for CNNs
Author	*Farhana Sharmin Snigdha, Ibrahim Ahmed, Susmita Dey Manasi, Meghna G. Mankalale (Univ. of Minnesota, U.S.A.), Jiang Hu (Texas A&M Univ., U.S.A.), Sachin S. Sapatnekar (Univ. of Minnesota, U.S.A.)
Page	pp. 487 - 492
Detailed information (abstract, keywords, etc)
Slides

6D-3 (Time: 16:25 - 16:50)

Title	FACH: FPGA-based Acceleration of Hyperdimensional Computing by Reducing Computational Complexity
Author	Mohsen Imani, Sahand Salamat, Saransh Gupta, *Jiani Huang, Tajana Rosing (UC San Diego, U.S.A.)
Page	pp. 493 - 498
Detailed information (abstract, keywords, etc)

Thursday, January 24, 2019

[To Session Table]

Session 3K Keynote III
Time: 9:00 - 10:00 Thursday, January 24, 2019
Location: Miraikan Hall
Chair: Shinji Kimura (Waseda Univ., Japan)

3K-1 (Time: 9:00 - 10:00)

Title	(Keynote Address) Hardware and Software Security Technologies to Enable Future Connected Cars
Author	Yasuhisa Shimazaki (Renesas Electronics, Japan)
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 7A (SS-4) Security of Machine Learning and Machine Learning for Security: Progress and Challenges for Secure, Machine Intelligent Mobile Systems
Time: 10:20 - 12:00 Thursday, January 24, 2019
Location: Room Saturn
Chairs: Xiang Chen (George Mason Univ., U.S.A.), Yanzhi Wang (Northeastern Univ., U.S.A.)

7A-1 (Time: 10:20 - 10:45)

Title	(Invited Paper) ADMM Attack: An Enhanced Adversarial Attack for Deep Neural Networks with Undetectable Distortions
Author	Pu Zhao, *Kaidi Xu (Northeastern Univ., U.S.A.), Sijia Liu (IBM Research, U.S.A.), Yanzhi Wang, Xue Lin (Northeastern Univ., U.S.A.)
Page	pp. 499 - 505
Detailed information (abstract, keywords, etc)
Slides

7A-2 (Time: 10:45 - 11:10)

Title	(Invited Paper) A System-level Perspective to Understand the Vulnerability of Deep Learning Systems
Author	Tao Liu, Nuo Xu, Qi Liu (Florida International Univ., U.S.A.), *Yanzhi Wang (Northeastern Univ., U.S.A.), Wujie Wen (Florida International Univ., U.S.A.)
Page	pp. 506 - 511
Detailed information (abstract, keywords, etc)

7A-3 (Time: 11:10 - 11:35)

Title	(Invited Paper) High-Performance Adaptive Mobile Security Enhancement against Malicious Speech and Image Recognition
Author	*Zirui Xu, Fuxun Yu (George Mason Univ., U.S.A.), Chenchen Liu (Clarkson Univ., U.S.A.), Xiang Chen (George Mason Univ., U.S.A.)
Page	pp. 512 - 517
Detailed information (abstract, keywords, etc)

7A-4 (Time: 11:35 - 12:00)

Title	(Invited Paper) AdverQuil: an Efficient Adversarial Detection and Alleviation Technique for Black-Box Neuromorphic Computing Systems
Author	Hsin-Pai Cheng, Juncheng Shen, Huanrui Yang (Duke Univ., U.S.A.), Qing Wu (Air Force Research Laboratory, U.S.A.), Hai Li, *Yiran Chen (Duke Univ., U.S.A.)
Page	pp. 518 - 525
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 7B System Level Modelling Methods II
Time: 10:20 - 12:00 Thursday, January 24, 2019
Location: Room Uranus
Chair: Naehyuck Chang (KAIST, Republic of Korea)

7B-1 (Time: 10:20 - 10:45)

Title	SIMULTime: Context-Sensitive Timing Simulation on Intermediate Code Representation for Rapid Platform Explorations
Author	*Alessandro Cornaglia, Alexander Viehl (FZI Research Center for Information Technology, Germany), Oliver Bringmann, Wolfgang Rosenstiel (Univ. of Tübingen, Germany)
Page	pp. 526 - 531
Detailed information (abstract, keywords, etc)
Slides

7B-2 (Time: 10:45 - 11:10)

Title	Modeling Processor Idle Times in MPSoC Platforms to Enable Integrated DPM, DVFS, and Task Scheduling Subject to a Hard Deadline
Author	Amirhossein Esmaili, Mahdi Nazemi, *Massoud Pedram (Univ. of Southern California, U.S.A.)
Page	pp. 532 - 537
Detailed information (abstract, keywords, etc)
Slides

Best Paper Candidate
7B-3 (Time: 11:10 - 11:35)

Title	Phone-nomenon: A System-Level Thermal Simulator for Handheld Devices
Author	*Hong-Wen Chiou, Yu-Min Lee, Shin-Yu Shiau (National Chiao Tung Univ., Taiwan), Chi-Wen Pan, Tai-Yu Chen (Mediatek, Taiwan)
Page	pp. 538 - 543
Detailed information (abstract, keywords, etc)
Slides

7B-4 (Time: 11:35 - 12:00)

Title	Virtual Prototyping of Heterogeneous Automotive Applications: Matlab, SystemC, or both?
Author	Xiao Pan, *Carna Zivkovic, Christoph Grimm (Univ. of Kaiserslautern, Germany)
Page	pp. 544 - 549
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 7C Placement
Time: 10:20 - 12:00 Thursday, January 24, 2019
Location: Room Venus
Chairs: Ting-Chi Wang (National Tsing Hua Univ.), Yasuhiro Takashima (Univ. of Kitakyushu, Japan)

Best Paper Candidate
7C-1 (Time: 10:20 - 10:45)

Title	Diffusion Break-Aware Leakage Power Optimization and Detailed Placement in Sub-10nm VLSI
Author	Sun ik Heo (Samsung Electronics, Republic of Korea), *Andrew B. Kahng, Minsoo Kim, Lutong Wang (UC San Diego, U.S.A.)
Page	pp. 550 - 556
Detailed information (abstract, keywords, etc)
Slides

7C-2 (Time: 10:45 - 11:10)

Title	MDP-trees: Multi-Domain Macro Placement for Ultra Large-Scale Mixed-Size Designs
Author	*Yen-Chun Liu (National Taiwan Univ., Taiwan), Tung-Chieh Chen (Maxeda Technology, Taiwan), Yao Wen Chang, Sy-Yen Kuo (National Taiwan Univ., Taiwan)
Page	pp. 557 - 562
Detailed information (abstract, keywords, etc)

7C-3 (Time: 11:10 - 11:35)

Title	A Shape-Driven Spreading Algorithm Using Linear Programming for Global Placement
Author	*Shounak Dhar (Univ. of Texas, Austin, U.S.A.), Love Singhal, Mahesh A. Iyer (Intel, U.S.A.), David Z. Pan (Univ. of Texas, Austin, U.S.A.)
Page	pp. 563 - 568
Detailed information (abstract, keywords, etc)

7C-4 (Time: 11:35 - 12:00)

Title	Finding Placement-Relevant Clusters With Fast Modularity-Based Clustering
Author	*Mateus Fogaça (Univ. Federal do Rio Grande do Sul, Brazil), Andrew B. Kahng (Univ. of California, San Diego, U.S.A.), Ricardo Augusto da Luz Reis (Univ. Federal do Rio Grande do Sul, Brazil), Lutong Wang (Univ. of California, San Diego, U.S.A.)
Page	pp. 569 - 576
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 7D Algorithms and Architectures for Emerging Applications
Time: 10:20 - 12:00 Thursday, January 24, 2019
Location: Room Mars+Room Mercury
Chair: Taewhan Kim (Seoul National Univ., Republic of Korea)

7D-1 (Time: 10:20 - 10:45)

Title	An Approximation Algorithm to the Optimal Switch Control of Reconfigurable Battery Packs
Author	Shih-Yu Chen, *Jie-Hong Jiang (National Taiwan Univ., Taiwan), Shou-Hung Ling, Shih-Hao Liang, Mao-Cheng Huang (ITRI, Taiwan)
Page	pp. 577 - 584
Detailed information (abstract, keywords, etc)

7D-2 (Time: 10:45 - 11:10)

Title	Autonomous Vehicle Routing In Multiple Intersections
Author	*Sheng-Hao Lin, Tsung-Yi Ho (National Tsing Hua Univ., Taiwan)
Page	pp. 585 - 590
Detailed information (abstract, keywords, etc)
Slides

7D-3 (Time: 11:10 - 11:35)

Title	GRAM: Graph Processing in a ReRAM-based Computational Memory
Author	*Minxuan Zhou, Mohsen Imani, Saransh Gupta, Yeseong Kim, Tajana Rosing (Univ. of California, San Diego, U.S.A.)
Page	pp. 591 - 596
Detailed information (abstract, keywords, etc)

7D-4 (Time: 11:35 - 12:00)

Title	ADEPOS: Anomaly Detection based Power Saving for Predictive Maintenance using Edge Computing
Author	*Sumon Kumar Bose, Bapi Kar, Mohendra Roy, Pradeep Kumar Gopalakrishnan, Arindam Basu (Nanyang Technological Univ., Singapore)
Page	pp. 597 - 602
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 8A (DF-3) Emerging Technologies for Tokyo Olympic 2020
Time: 13:15 - 14:30 Thursday, January 24, 2019
Location: Room Saturn
Organizer/Chair: Koichiro Yamashita (Fujitsu, Japan), Organizer: Akihiko Inoue (Panasonic, Japan)

8A-1 (Time: 13:15 - 13:40)

Title	(Designers' Forum) Walking assistive powered-wear 'HIMICO' with wire-driven assist
Author	Kenta Murakami (Panasonic, Japan)
Detailed information (abstract, keywords, etc)

8A-2 (Time: 13:40 - 14:05)

Title	(Designers' Forum) Deep Scene Recognition with Object Detection
Author	Zhiming Tan (Fujitsu R&D Center, China)
Detailed information (abstract, keywords, etc)

8A-3 (Time: 14:05 - 14:30)

Title	(Designers' Forum) Spatial and battery sensing solutions for smart cities leading to 2020
Author	Hiroyuki Tsujikawa (Panasonic, Japan)
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 8B Embedded Software for Parallel Architecture
Time: 13:15 - 14:30 Thursday, January 24, 2019
Location: Room Uranus
Chairs: Zhaoyan Shen (Shandong Univ.), Weichen Liu (Nanyang Technological Univ.)

8B-1 (Time: 13:15 - 13:40)

Title	Efficient Sporadic Task Handling in Parallel AUTOSAR Applications Using Runnable Migration
Author	*Milan Copic, Rainer Leupers, Gerd Ascheid (RWTH Aachen Univ., Germany)
Page	pp. 603 - 608
Detailed information (abstract, keywords, etc)

8B-2 (Time: 13:40 - 14:05)

Title	A Heuristic for Multi Objective Software Application Mappings on Heterogeneous MPSoCs
Author	*Gereon Onnebrink, Ahmed Hallawa, Rainer Leupers, Gerd Ascheid (RWTH Aachen Univ., Germany), Awaid-Ud-Din Shaheen (Silexica GmbH, Germany)
Page	pp. 609 - 614
Detailed information (abstract, keywords, etc)
Slides

8B-3 (Time: 14:05 - 14:30)

Title	ReRAM-based Processing-in-Memory Architecture for Blockchain Platforms
Author	*Fang Wang (Hong Kong Polytechnic Univ., Hong Kong), Zhaoyan Shen (Shandong Univ., China), Lei Han (Hong Kong Polytechnic Univ., Hong Kong), Zili Shao (Chinese Univ. of Hong Kong, Hong Kong)
Page	pp. 615 - 620
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 8C Machine Learning and Hardware Security
Time: 13:15 - 14:30 Thursday, January 24, 2019
Location: Room Venus
Chair: Hiromitsu Awano (Osaka Univ.)

8C-1 (Time: 13:15 - 13:40)

Title	Towards Practical Homomorphic Email Filtering: A Hardware-Accelerated Secure Naive Bayesian Filter
Author	*Song Bian, Masayuki Hiromoto, Takashi Sato (Kyoto Univ., Japan)
Page	pp. 621 - 626
Detailed information (abstract, keywords, etc)
Slides

8C-2 (Time: 13:40 - 14:05)

Title	A 0.16pJ/bit Recurrent Neural Network Based PUF for Enhanced Machine Learning Attack Resistance
Author	*Nimesh Kirit Shah (Nanyang Technological Univ., Singapore), Manaar Alam (Indian Inst. of Tech. Kharagpur, India), Durga Prasad Sahoo (Robert Bosch Engineering and Business Solutions Private, India), Debdeep Mukhopadhyay (Indian Inst. of Tech. Kharagpur, India), Arindam Basu (Nanyang Technological Univ., Singapore)
Page	pp. 627 - 632
Detailed information (abstract, keywords, etc)
Slides

8C-3 (Time: 14:05 - 14:30)

Title	P³M: A PIM-based Neural Network Model Protection Scheme for Deep Learning Accelerator
Author	*Wen Li, Ying Wang, Huawei Li, Xiaowei Li (Chinese Academy of Sciences, China)
Page	pp. 633 - 638
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 8D Memory Architecture for Efficient Neural Network Computing
Time: 13:15 - 14:30 Thursday, January 24, 2019
Location: Room Mars+Room Mercury
Chairs: Jongeun Lee (UNIST, Republic of Korea), Bei Yu (Chinese Univ. of Hong Kong, Hong Kong)

8D-1 (Time: 13:15 - 13:40)

Title	Learning the Sparsity for ReRAM: Mapping and Pruning Sparse Neural Network for ReRAM based Accelerator
Author	*Jilan Lin (UCSB/Tsinghua Univ., China), Zhenhua Zhu, Yu Wang (Tsinghua Univ., China), Yuan Xie (UCSB, U.S.A.)
Page	pp. 639 - 644
Detailed information (abstract, keywords, etc)
Slides

8D-2 (Time: 13:40 - 14:05)

Title	In-Memory Batch-Normalization for Resistive Memory based Binary Neural Network Hardware
Author	*Hyungjun Kim, Yulhwa Kim, Jae-Joon Kim (POSTECH, Republic of Korea)
Page	pp. 645 - 650
Detailed information (abstract, keywords, etc)
Slides

8D-3 (Time: 14:05 - 14:30)

Title	Exclusive On-Chip Memory Architecture for Energy-Efficient Deep Learning Acceleration
Author	*Hyeonuk Sim (UNIST, Republic of Korea), Jason Anderson (Univ. of Toronto, Canada), Jongeun Lee (UNIST, Republic of Korea)
Page	pp. 651 - 656
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 9A (DF-4) Beyond the Virtual Reality World
Time: 14:50 - 16:05 Thursday, January 24, 2019
Location: Room Saturn
Organizer: Hiroe Iwasaki (NTT, Japan), Organizer/Chair: Masaru Kokubo (Hitachi, Japan)

9A-1 (Time: 14:50 - 15:15)

Title	(Designers' Forum) The World of VR2.0
Author	Michitaka Hirose (Univ. of Tokyo, Japan)
Detailed information (abstract, keywords, etc)

9A-2 (Time: 15:15 - 15:40)

Title	(Designers' Forum) Optical fiber scanning system for ultra-lightweight wearable display
Author	Yoshio Seo (Hitachi, Japan)
Detailed information (abstract, keywords, etc)

9A-3 (Time: 15:40 - 16:05)

Title	(Designers' Forum) Superreal Video Representation for Enhanced Sports Experiences - R&D on VR x AI technologies –
Author	Hideaki Kimata (NTT, Japan)
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 9B Logic-Level Security and Synthesis
Time: 14:50 - 16:05 Thursday, January 24, 2019
Location: Room Uranus
Chair: Kenshu Seto (Tokyo City Univ.)

9B-1 (Time: 14:50 - 15:15)

Title	BeSAT: Behavioral SAT-based Attack on Cyclic Logic Encryption
Author	Yuanqi Shen, You Li, Amin Rezaei, Shuyu Kong, David Dlott, *Hai Zhou (Northwestern Univ., U.S.A.)
Page	pp. 657 - 662
Detailed information (abstract, keywords, etc)
Slides

9B-2 (Time: 15:15 - 15:40)

Title	Structural Rewriting in XOR-Majority Graphs
Author	*Zhufei Chu (Ningbo Univ., China), Mathias Soeken (EPFL, Switzerland), Yinshui Xia, Lunyao Wang (Ningbo Univ., China), Giovanni De Micheli (EPFL, Switzerland)
Page	pp. 663 - 668
Detailed information (abstract, keywords, etc)
Slides

9B-3 (Time: 15:40 - 16:05)

Title	Design Automation for Adiabatic Circuits
Author	*Alwin Zulehner (Johannes Kepler Univ. Linz, Austria), Micheal Frank (Sandia National Labs, U.S.A.), Robert Wille (Johannes Kepler Univ. Linz, Austria)
Page	pp. 669 - 674
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 9C Analysis and Algorithms for Digital Design Verification
Time: 14:50 - 16:05 Thursday, January 24, 2019
Location: Room Venus
Chairs: Mark Po-Hung Lin (National Chung Cheng Univ., Taiwan), Andreas G. Veneris (Univ. of Toronto, Canada)

Best Paper Candidate
9C-1 (Time: 14:50 - 15:15)

Title	A Figure of Merit for Assertions in Verification
Author	Samuel Hertz, *Debjit Pal, Spencer Offenberger, Shobha Vasudevan (Univ. of Illinois, Urbana-Champaign, U.S.A.)
Page	pp. 675 - 680
Detailed information (abstract, keywords, etc)
Slides

9C-2 (Time: 15:15 - 15:40)

Title	Suspect2vec: A Suspect Prediction Model for Directed RTL Debugging
Author	*Neil Veira, Zissis Poulos, Andreas Veneris (Univ. of Toronto, Canada)
Page	pp. 681 - 686
Detailed information (abstract, keywords, etc)
Slides

9C-3 (Time: 15:40 - 16:05)

Title	Path Controllability Analysis for High Quality Designs
Author	*Li-Jie Chen (National Taiwan Univ., Taiwan), Hong-Zu Chou, Kai-Hui Chang (Avery Design Systems, U.S.A.), Sy-Yen Kuo (National Taiwan Univ., Taiwan), Chilai Huang (Avery Design Systems, U.S.A.)
Page	pp. 687 - 692
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 9D FPGA and Optics-Based Neural Network Designs
Time: 14:50 - 16:05 Thursday, January 24, 2019
Location: Room Mars+Room Mercury
Chair: Taewhan Kim (Seoul National Univ., Republic of Korea)

9D-1 (Time: 14:50 - 15:15)

Title	Implementing Neural Machine Translation with Bi-Directional GRU and Attention Mechanism on FPGAs Using HLS
Author	Qin Li, *Xiaofan Zhang (Univ. of Illinois, Urbana-Champaign, U.S.A.), Jinjun Xiong (IBM, U.S.A.), Wen-mei Hwu, Deming Chen (Univ. of Illinois, Urbana-Champaign, U.S.A.)
Page	pp. 693 - 698
Detailed information (abstract, keywords, etc)
Slides

9D-2 (Time: 15:15 - 15:40)

Title	Efficient FPGA Implementation of Local Binary Convolutional Neural Network
Author	Aidyn Zhakatayev, *Jongeun Lee (Ulsan National Inst. of Science and Tech., Republic of Korea)
Page	pp. 699 - 704
Detailed information (abstract, keywords, etc)

9D-3 (Time: 15:40 - 16:05)

Title	Hardware-software Co-design of Slimmed Optical Neural Networks
Author	*Zheng Zhao, Derong Liu, Meng Li, Zhoufeng Ying, Biying Xu (Univ. of Texas, Austin, U.S.A.), Lu Zhang, Bei Yu (Chinese Univ. of Hong Kong, Hong Kong), Ray T. Chen, David Z. Pan (Univ. of Texas, Austin, U.S.A.)
Page	pp. 705 - 710
Detailed information (abstract, keywords, etc)

[To Session Table]

Session 10A (SS-5) The Resurgence of Reconfigurable Computing in the Post Moore Era
Time: 16:25 - 17:40 Thursday, January 24, 2019
Location: Room Saturn
Chair: Antonino Tumeo (Pacific Northwest National Laboratory, U.S.A.)

10A-1 (Time: 16:25 - 16:50)

Title	(Invited Paper) Software Defined Architectures for Data Analytics
Author	*Vito Giovanni Castellana, Marco Minutoli, Antonino Tumeo (Pacific Northwest National Laboratory, U.S.A.), Pietro Fezzardi, Marco Lattuada, Fabrizio Ferrandi (Politecnico di Milano, Italy)
Page	pp. 711 - 718
Detailed information (abstract, keywords, etc)
Slides

10A-2 (Time: 16:50 - 17:15)

Title	(Invited Paper) Runtime Reconfigurable Memory Hierarchy in Embedded Scalable Platforms
Author	Davide Giri, Paolo Mantovani, *Luca P. Carloni (Columbia Univ., U.S.A.)
Page	pp. 719 - 726
Detailed information (abstract, keywords, etc)

10A-3 (Time: 17:15 - 17:40)

Title	(Invited Paper) XPPE: Cross-Platform Performance Estimation of Hardware Accelerators Using Machine Learning
Author	*Hosein Mohamamdi Makrani, Hossein Sayadi, Tinoosh Mohsenin, Avesta Sasan, Houman Homayoun, Setareh Rafatirad (George Mason Univ., U.S.A.)
Page	pp. 727 - 732
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 10B Hardware Acceleration
Time: 16:25 - 17:40 Thursday, January 24, 2019
Location: Room Uranus
Chairs: Yongpan Liu (Tsinghua Univ., China), Xiang Chen (George Mason Univ., U.S.A.)

10B-1 (Time: 16:25 - 16:50)

Title	Addressing the Issue of Processing Element Under-Utilization in General-Purpose Systolic Deep Learning Accelerators
Author	Bosheng Liu (Univ. of Chinese Academy of Sciences/Chinese Academy of Sciences, China), *Xiaoming Chen, Ying Wang, Yinhe Han (Chinese Academy of Sciences, China), Jiajun Li, Haobo Xu (Univ. of Chinese Academy of Sciences, China), Xiaowei Li (Chinese Academy of Sciences, China)
Page	pp. 733 - 738
Detailed information (abstract, keywords, etc)

10B-2 (Time: 16:50 - 17:15)

Title	ALook: Adaptive Lookup for GPGPU Acceleration
Author	*Daniel Peroni, Mohsen Imani, Tajana Rosing (Univ. of California, San Diego, U.S.A.)
Page	pp. 739 - 746
Detailed information (abstract, keywords, etc)
Slides

10B-3 (Time: 17:15 - 17:40)

Title	Collaborative Accelerators for In-Memory MapReduce on Scale-up Machines
Author	*Abraham Addisie, Valeria Bertacco (Univ. of Michigan, U.S.A.)
Page	pp. 747 - 753
Detailed information (abstract, keywords, etc)
Slides

[To Session Table]

Session 10C Routing
Time: 16:25 - 17:40 Thursday, January 24, 2019
Location: Room Venus
Chairs: Hunng-Ming Chen (NCTU), Kohira Yukihide (Univ. of Aizu)

10C-1 (Time: 16:25 - 16:50)

Title	Detailed Routing by Sparse Grid Graph and Minimum-Area-Captured Path Search
Author	*Gengjie Chen, Chak-Wa Pui, Haocheng Li, Jingsong Chen, Bentian Jiang, Evangeline F. Y. Young (Chinese Univ. of Hong Kong, Hong Kong)
Page	pp. 754 - 760
Detailed information (abstract, keywords, etc)
Slides

10C-3 (Time: 16:50 - 17:15)

Title	Latency Constraint Guided Buffer Sizing and Layer Assignment for Clock Trees with Useful Skew
Author	*Necati Uysal (Univ. of Central Florida, U.S.A.), Wen-Hao Liu (Cadence Design Systems, U.S.A.), Rickard Ewetz (Univ. of Central Florida, U.S.A.)
Page	pp. 761 - 766
Detailed information (abstract, keywords, etc)
Slides

The 24th Asia and South Pacific Design Automation Conference Technical Program

Session Schedule

List of papers

The 24th Asia and South Pacific Design Automation Conference
Technical Program