Designers' Forum

kDesigners' Forum is conceiynoteeved as a unique program that shares the design experience and solutions of real product developments among LSI designers and EDA academia/developers. The topics discussed in this forum include Next-Generation Computing, Advanced Sensor Technologies and Application, Edge AI Design, and Panel Discussion : Aiming Direction of DX System Design from Hardware to Application.

  • Date: January 18-19, 2023
  • Place: Miraikan Hall, 7F
  • Designers' Forum Co-chairs:
    • Koichiro Yamashita (Fujitsu R&D Center Co., LTD. China)
    • Takatsugu Ono (Kyushu University, Japan)
  • Designers' Forum Members:
    • Chihiro Yoshimura (Hitachi, Ltd. Japan)
    • Yasuhisa Tochigi (SONY Semiconductor Solutions Corp. Japan)
    • Yohei Nakata (Panasonic Holdings Corporation, Japan)
    • Noriyuki Miura (Osaka University, Japan)

Date/
Time		 Title
DF Keynote / 5E January 18, 13:00 - 14:40 The Impact of AI in Intelligent System Design / Next-Generation Computing
6E January 18, 15:00 - 16:15 Oral Session:
Advanced Sensor Technologies and Application
8E January 19, 13:00 - 14:15 Oral Session:
Edge AI Design
9E January 19, 15:00 - 16:15 Panel Session:
Aiming Direction of DX System Design from Hardware to Application


DF Keynote / Session 5E: (Wednesday, January 18, 13:00 - 14:40)

DF Keynote: The Impact of AI in Intelligent System Design

Session Chair: Matthieu Parizy (Fujitsu Ltd., Japan)

  • 1: The Impact of AI in Intelligent System Design

    Simon Chang (Cadence)

    Electronics design is undergoing a revolution as semiconductors are used in more and more market applications. Each has its unique data and workload and requires customized compute and analytics architectures. Advanced semiconductors are implemented in the latest process nodes, in the most complex 3D-ICs, to achieve top performance with more operational flexibility. When the scope is expanded to the full system, complexity further exceeds the traditional siloed engineering teams and methodology. AI is showing promise for addressing the growing complexity, finding optimal design outcomes, and substantially improving overall team productivity. But not all problems are equal. Which are the intelligent system design challenges that AI is best suited for? What impact should be expected from applying AI to these challenges? And what is the frontier of AI solutions for intelligent system design?

Oral Session: Next-Generation Computing

Organizer: Chihiro YOSHIMURA (Hitachi, Ltd., Japan)
Session Chair: Takatsugu ONO (Kyushu University, Japan)

To improve computer performance, it is necessary to increase power efficiency, and until now, semiconductor process miniaturization has been the driving force. However, in the post-Moore era, it will be difficult to improve power efficiency using only conventional approaches, and computer architecture research is being forced to shift to new approaches. In the first presentation, research on processors for embedded systems with challenging heat generation and cost constraints will be presented. The second presentation will introduce processors based on silicon photonics. On the other hand, research on computers based on new operating principles, such as quantum computers, is also emerging. However, quantum computers require classical computers and electronics to control the qubits, and their power and area efficiency is a challenge. the third and fourth presentations will present research on this challenge.

  • 2: General-Purpose Scalar/Vector Processor for Accelerating Wide Range of Tasks Including Automotive and Industrial Applications

    Masayuki Ito (NSITEXE Inc., Japan)

    Efficient execution of AI and other computing on edge devices has become an important issue in embedded systems due to strict heat and cost constraints. In this talk, a solution and techniques being explored to efficiently accelerate the computation of wide range of contributions to the embedded systems will be covered. More specifically, scalable solutions for each application by combining versatile MIMD-based processors with vector units will be introduced. Both task-level parallelism and data-level parallelism are fulfilled by the processors and the vector units, and tight coordination of them are key to efficient execution contribution. Software solutions including model deployment and toolchains will also be discussed.

  • 3: 16x16 Photonic Analog Vector Matrix Multipliers Based on Silicon Photonics

    Shota Kita (NTT Basic Research Laboratories, Japan)

    Owing to recent advances in machine learning and silicon photonics, on-chip photonic processing has been recognized as promising for energy-saving, low latency linear analog matrix operations. In this talk, we show our recent progress on a 16x16 on-chip vector matrix processor with complex-valued inputs based on silicon photonics as a central component of the processor architecture. Furthermore, we developed two calibration schemes based on machine learning techniques, one is specialized for a single task, and the other is for general matrix implementation with a fidelity of ~0.859. We show some initial results of MNIST database classification task as the benchmark.

  • 4: Research Activities toward Larger-Scale Cryogenic Quantum Computer Systems

    Teruo Tanimoto (Kyushu University, Japan)

    Quantum computing (QC) attracts interests in both academia and industries. One of the unique characteristics of R&D of QC is that hardware, software, and system integration are concurrently surveyed. Intensive collaborations across research fields are crucial to realize QC. Since some attractive quantum devices require a cryogenic environment, the power-efficient cryogenic classical information processing is necessary to construct larger-scale QC systems. Kyushu University has started Quantum Computing System Center in February 2022 and we are exploring emerging device technologies such as Single-Flux-Quantum logic circuit and Nanobridge FPGA. In this talk, I would like to introduce our recent activities.

  • 5: Cryogenic Bias Voltage Control Circuits for Large Scale Qubit Arrays

    Takuji Miki (Kobe University, Japan)

    Controlling quantum bits (qubits) from cryogenic temperature inside a dilution refrigerator is a key challenge towards large scale quantum computers. Cryogenic CMOS analog circuits, embedded in such controllers for qubit manipulation and readout, require an extremely small area and low power consumption to accommodate parallel control of qubit arrays with limited power budget for heat suppression. This presentation introduces a design strategy of a cryogenic digital to analog converter (DAC) for biasing silicon spin qubits. The bias DAC achieves both compact layout and low power consumption while keeping high linearity by effectively utilizing inherent circuit characteristics at cryogenic temperature.

Session 6E: (Wednesday, January 18, 15:00 - 16:15)

Oral Session: Advanced Sensor Technologies and Application

Organizer: Yasuhisa TOCHIGI (SONY Semiconductor Solutions Corp., Japan)
Session Chair: Yasuhisa TOCHIGI (SONY Semiconductor Solutions Corp., Japan)

This session showcases some of the recent advances of the sensor technologies and applications. It begins with a talk describing an organic photoconductive-film CMOS image sensor that achieves wide dynamic range, global shutter and RGB-NIR sensing. The next talk presents a 3D-BSI 1Mpixel charge focusing SPAD image sensor with <0.4W low power consumption and 134dB dynamic range. This session ends with a 1200x84-pixels 64cc Solid-State LiDAR RX with active-quenching SPAD consisting of hybrid HV/LV transistors and digital SPAD characteristic compensation circuits.

  • 1: Advanced Technologies of an Organic-Photoconductive-Film CMOS Image Sensor

    Naoki Shimasaki (Panasonic Holdings Corporation, Japan)

    In this presentation, we introduce our organic-photoconductive-film CMOS (OPF) image sensor technologies. The OPF image sensor has three major features due to its unique structure. (i) the wide dynamic range technology. A photoelectric conversion and charge storage parts are completely independent. Therefore, the OPF image sensor realize a significant improvement of dynamic range performance. (ii) the global shutter technology. A photoelectric conversion efficiency is electrically controllable, so the OPF image sensor actualize a high-speed exposure control like physical mechanical shutter. (iii) the RGB-NIR sensing technology. A photoelectric conversion wavelength is selectable by changing the organic film material. Hence OPF image sensor can achieve high sensitivity to the user's desired wavelength. Consequently, the OPF image sensor will be beyond human sensing ability and suitable for the field of industrial, surveillance, automotive and so on.

  • 2: A 0.37W 143dB-Dynamic-Range 1Mpixel Backside-Illuminated Charge-Focusing SPAD Image Sensor with Pixel-Wise Exposure Control and Adaptive Clocked Recharging

    Yasuharu Ota, K. Morimoto (Canon Inc., Japan)

    We present a 3D-BSI 1Mpixel charge focusing SPAD image sensor based on pixel-wise exposure control, adaptive clocked recharging, and dead-time-free global shutter at 90fps. The proposed architecture enables scalable implementation of photon counting pixels with <0.4W sensor power consumption and 143dB dynamic range with PDE of 70% and DCR of 2.5cps. Single-photon-sensitive HDR imaging result verifies the feasibility of the SPAD sensor for security, automotive and medical imaging applications.

  • 3: A 1200x84-pixels 64cc Solid-State LiDAR RX with an HV/LV transistors Hybrid Active-Quenching-SPAD Array and Background Digital PT Compensation

    Tuan Thanh Ta (Toshiba Corp. R&D Center, Japan)

    This paper presents two essential techniques, Active-Quenching (AQ) SPAD consisting of hybrid HV/LV transistors and Digital SPAD Characteristic Compensation (DSCC) circuit to realize high-performance and palm-sized LiDAR. The hybrid AQ circuit shrinks the pixel area while ensuring a high sensitivity. The high pixel density 2D-SPAD array realizes a high image-resolution LiDAR while reducing the light-receiver (RX) unit size and its light-receiving lens. The DSCC provides an on-chip Process/Temperature (PT) calibration without external components, which contributes to weather ability assurance and LiDAR miniaturization. These technologies downsize LiDAR RX to the world's smallest size, 64cc, and realize a total 350cc size LiDAR with its competitive performance as a mechanical one.

Session 8E: (Thursday, January 19, 13:00 - 14:15)

Oral Session: Edge AI Design

Organizer: Yohei Nakata (Panasonic Holdings Corporation, Japan)
Session Chair: Yohei Nakata (Panasonic Holdings Corporation, Japan)

Edge AI systems/solutions are emerging for various applications like ADAS, surveillance, retail, and smart factory, which require real-time processing, working at poor network connections, or privacy protection. Building a practical edge AI system requires many layers of technology: efficient AI algorithms, processors, sensors, system integration techniques, etc. In this session, technologies required for edge AI systems are introduced by distinguished speakers. The first talk introduces ultra-low energy edge AI solutions exploiting neuromorphic computing. The second talk introduces the optimization method of AI training to improve generalizability on unseen scenes as well as getting more robustness on the quantized model for inference at the edge. The third talk introduces a fusion system for ADAS that treats the interrelationship between three layers of "fusion". The last talk introduces privacy protected sensing system which uses mm-Wave radar for human fall detection.

  • 1: Neuromorphic Computing Expanding AI Coverage at the Edge with Ultra-Low Energy Consumption

    Kazuhisa Fujimoto (Hitachi, Ltd., Japan)

    Neuromorphic computing, which is based on a spiking neural network (SNN) model that mimics brain processing to significantly reduce its energy consumption to 1% or less than that of a GPU, has been an active research topic in recent years with the emergence of neuromorphic devices. The challenge is to develop optimal SNN models, algorithms, and engineering technologies for real use cases. Various applications have been investigated to address these challenges. Neuromorphic computing can be a fundamental technology to support future AI development, especially in edge computing because of its need for ultra-low energy consumption. Application studies at the edge are presented in this talk.

  • 2: HERO: Hessian-Enhanced Robust Optimization for Unifying and Improving Generalization and Quantization Performance

    Huanrui Yang (University of California, Berkeley, USA)

    With the recent demand of deploying neural network models on mobile and edge devices, it is desired to improve the model's generalizability on unseen testing data, as well as enhance the model's robustness under post-training fixed-point quantization with dynamic precision for efficient deployment. Minimizing the training loss, however, provides few guarantees on the generalization and quantization performance. In this work, we improve generalization and quantization performance simultaneously by theoretically unifying them under the framework of robustness against bounded weight perturbation. We therefore propose HERO, a Hessian-enhanced robust optimization method, to minimize the Hessian eigenvalues through a gradient-based training process, simultaneously improving the generalization and quantization performance.

  • 3: Object-Based Fusion System in ADAS

    Yan Zheng (Huayu Automotive Systems Co.,Ltd., China)

    As different types of sensors are applied in ADAS, most ADAS systems are becoming multi-sensor systems beyond single-sensor systems, and fusion techniques are widely applied in these systems. Generally speaking, a fusion system has three levels. The first level is the sensor level, which may include sensors such as cameras, millimeter wave radar, ultra-sonic radar, and Lidar. The second level is the fusion level, which integrates the object information detected by sensors and outputs the fused object with speed, distance, and other properties. The third level is the application level, which sends the brake or steering request to the vehicle actuators to realize automatically longitudinal and lateral control. In this speech, the interrelationship between levels and the system will be explained.

  • 4: Millimeter-Wave Radar: A New Approach for Privacy Protection Human Sensing

    Jun Tian (Fujitsu R&D Center Co.,Ltd., China)

    As ageing society is coming, to care the elder people better, some sensing approaches are critical to protect them from harm like falling. Using video can effectively realize the function. But, considering the privacy issue, it is not suitable to be used in bedroom, toilet etc. where falling happens frequently. mmWave radar, progressing rapidly recently, is a good candidate to realize the sensing function in the scenario. In this report, based on two sensing methodologies, the research of human fall detection technologies using mmWave radar is introduced.

Session 9E: (Thursday, January 19, 15:00 - 16:15)

Panel Discussion: Aiming Direction of DX System Design from Hardware to Application

Organizer: Koichiro YAMASHITA (Fujitsu R&D Center Co., LTD., China)
Session Chair: Koichiro YAMASHITA (Fujitsu R&D Center Co., LTD., China)

Common topic or keyword with Designer's Forum speakers from different layers and fields. In oral sessions, there are hot and traditional fields such as "next-generation computers," "sensors," and"edge." Then "Automotive" emerged as a common keyword. The theme of panel discussion is "Aiming Direction of DX (Digital Transformation) System Design from Hardware to Application," and opinions will be exchanged at Automotive as a specific application topic. Speakers of the oral sessions will join again as panelists as much as time allows, and to conduct meaningful discussions. Speakers, various layers and different fields, hope that it will be an opportunity to discover new perspectives and collaboration in future.

Panelist: Speakers' from Designer's Forum

Last Updated on: December 21, 2022