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WIP Poster Session at ASP-DAC 2023
In ASP-DAC 2023, we will host a WIP session for the first time.
Presenters provide poster presentation on their ongoing work,
with fresh problems/solutions. WIP content is typically material
that may not be mature or complete enough for full paper submission
and will not be included in the proceedings. This is an excellent
opportunity to present and discuss ongoing research with experts
from the design automation community around the world.
We strongly encourage presentations at this session from
students and young researchers from both of academics and industries.
- Date and Time: 18:00-20:00, January 17 (the end time is tentative)
- Place: Room Jupiter
| Poster ID | Title | Authors | Affiliation |
| 1 | (Withdrawn) | ||
| 2 | Coefficient Bit-Width Reduction for Ising Machines | Yuta Yachi, Masashi Tawada, Nozomu Togawa | Waseda University (Japan) |
| 3 | Repeating Ising machines to solve combinatorial optimization problems | Keisuke Fukada, Nozomu Togawa | Waseda University (Japan) |
| 4 | The Best of Both Worlds: Optimizing In-memory Key-value Store over Heterogeneous Memory. | LeeJu Kim, SeungMin Shin | Soongsil University (Korea) |
| 5 | A Countermeasure to Power Analysis Attack in Flip Flops | Tomoaki Ukezono | Fukuoka University (Japan) |
| 6 | Research on Formulation for Modeling Time Reduction of Simulated Quantum Annealing Machine | Haruki Nakayama, Yukihide Kohira | The University of Aizu (Japan) |
| 7 | Warp Equalizer: Dynamic Intra-warp Load Balancing on Nested Irregular Parallel Applications | Bo-Wun Cheng†, En-Ming Huang†, Chun-Yi Lee†, Tsung Tai Yeh†† | †National Tsing Hua University (Taiwan), ††National Yang Ming Chiao Tung University (Taiwan) |
| 8 | Variable bitrate learned image compression on FPGA | Heming Sun† , Qingyang Yi††, Jiro Katto†, Masahiro Fujita†† | †Waseda University (Japan), ††The University of Tokyo (Japan) |
| 9 | Comparison of Measurement Point Selection Algorithms for Testing Power TSVs | Kouta Fujimoto, Koutaro Hachiya | Teikyo Heisei University (Japan) |
In Cooperation with:
IEEE Council on Electronic Design Automation (CEDA) All Japan Joint Chapter
IEEE Circuits and Systems Society (CASS) Japan Joint Chapter
TOPIC:
Topic must be relevant to the ASP-DAC community.
ELIGIBILITY:
Students and young researchers are encouraged to submit, but anyone is welcome.
This session will be held in the same time of the Student Research Forum.
Those who are able to present in this session should submit.
Please note that we do not support a VISA application only to attend
this session.
PRESENTATION FORMAT:
Poster presentation in English (In-person only)
SUBMISSION:
Please submit from the submission form.
Acceptance will be judged by submitted abstract considering
the topic, the potential, and etc. Please note that the rejection
does not mean that the quality of the work is not good.
ATTENDANCE:
This session is free for attendance. Presenters and Participants
is not required the registration to ASP-DAC for this session only.
We highly recommend you register and participate in the ASP-DAC.
IMPORTANT DATES:
Submissions Deadline: Dec. 26, 2022 Jan. 4, 2023
Date of Acceptance Notification Date: Jan. 4 Jan. 5, 2023
ORGANIZERS:
- Chair:
- Yuichi Nakamura (NEC, Japan)
- Secretary:
- Shimpei Sato (Shinshu Univ., Japan)
CONTACT INFORMATION:
For queries, please send an e-mail to ASP-DAC HQ (aspdac2023[at]aspdac.com).