| Title | A Wireless Real-Time On-Chip Bus Trace System |
| Author | *Shusuke Kawai, Takayuki Ikari (Keio Univ., Japan), Yutaka Takikawa (Renesas Design Corp, Japan), Hiroki Ishikuro, Tadahiro Kuroda (Keio Univ., Japan) |
| Page | pp. 91 - 92 |
| Detailed information (abstract, keywords, etc) | |
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| Title | CKVdd: A Self-Stabilization Ramp-Vdd Technique for Dynamic Power Reduction |
| Author | Chin-Hsien Wang, *Ching-Hwa Cheng (Feng Chia Univ., Taiwan), Jiun-In Guo (National Chung Cheng Univ., Taiwan) |
| Page | pp. 93 - 94 |
| Detailed information (abstract, keywords, etc) | |
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| Title | A 300 nW, 7 ppm/℃ CMOS Voltage Reference Circuit based on Subthreshold MOSFETs |
| Author | *Ken Ueno (Hokkaido Univ., Japan), Tetsuya Hirose (Kobe Univ., Japan), Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ., Japan) |
| Page | pp. 95 - 96 |
| Detailed information (abstract, keywords, etc) | |
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| Title | A 100Mbps, 0.19mW Asynchronous Threshold Detector with DC Power-Free Pulse Discrimination for Impulse UWB Receiver |
| Author | *Lechang Liu, Yoshio Miyamoto, Zhiwei Zhou, Kosuke Sakaida, Jisun Ryu, Koichi Ishida, Makoto Takamiya, Takayasu Sakurai (Univ. of Tokyo, Japan) |
| Page | pp. 97 - 98 |
| Detailed information (abstract, keywords, etc) | |
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| Title | Low-Power CMOS Transceiver Circuits for 60GHz Band Millimeter-wave Impulse Radio |
| Author | *Ahmet Oncu, Minoru Fujishima (Univ. of Tokyo, Japan) |
| Page | pp. 99 - 100 |
| Detailed information (abstract, keywords, etc) | |
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| Title | An Inductor-less MPPT Design for Light Energy Harvesting Systems |
| Author | Hui Shao, *Chi-Ying Tsui, Wing-Hung Ki (HKUST, Hong Kong) |
| Page | pp. 101 - 102 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A 1 GHz CMOS Comparator with Dynamic Offset Control Technique |
| Author | *Xiaolei Zhu (Keio Univ., Japan), Sanroku Tsukamoto (Fujitsu Laboratories Ltd., Japan), Tadahiro Kuroda (Keio Univ., Japan) |
| Page | pp. 103 - 104 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Circuit Design Using Stripe-Shaped PMELA TFTs on Glass |
| Author | *Keita Ikai, Jinmyoung Kim, Makoto Ikeda, Kunihiro Asada (Univ. of Tokyo, Japan) |
| Page | pp. 105 - 106 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Low Energy Level Converter Design for Sub-Vth Logics |
| Author | Hui Shao, *Chi-Ying Tsui (HKUST, Hong Kong) |
| Page | pp. 107 - 108 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A Time-to-Digital Converter with Small Circuitry |
| Author | Kazuya Shimizu, *Masato Kaneta, HaiJun Lin, Haruo Kobayashi, Nobukazu Takai (Gunma Univ., Japan), Masao Hotta (Musashi Inst. of Tech., Japan) |
| Page | pp. 109 - 110 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A VDD Independent Temperature Sensor Circuit with Scaled CMOS Process |
| Author | *Hiroki Oshiyama, Toshihiro Matsuda, Kei-ichi Suzuki, Hideyuki Iwata (Toyama Prefectural Univ., Japan), Takashi Ohzone (Dawn Enterprise Co. Ltd., Japan) |
| Page | pp. 111 - 112 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A Current-mode DC-DC Converter using a Quadratic Slope Compensation Scheme |
| Author | *Chihiro Kawabata, Yasuhiro Sugimoto (Chuo Univ., Japan) |
| Page | pp. 113 - 114 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Ultra Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids |
| Author | *Yu-Ting Kuo, Tay-Jyi Lin, Yueh-Tai Li (National Chiao Tung Univ., Taiwan), Chou-Kun Lin (ITRI, STC, Taiwan), Chih-Wei Liu (National Chiao Tung Univ., Taiwan) |
| Page | pp. 115 - 116 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | An 11,424 Gate-Count Dynamic Optically Reconfigurable Gate Array with a Photodiode Memory Architecture |
| Author | Daisaku Seto, *Minoru Watanabe (Shizuoka Univ., Japan) |
| Page | pp. 117 - 118 |
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| Slides | |
| Title | A Low-Power FPGA Based on Autonomous Fine-Grain Power-Gating |
| Author | *Shota Ishihara, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ., Japan) |
| Page | pp. 119 - 120 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A 52-mW 8.29mm2 19-mode LDPC Decoder Chip for Mobile WiMAX Applications |
| Author | *Xin-Yu Shih, Cheng-Zhou Zhan, Cheng-Hung Lin, An-Yeu (Andy) Wu (National Taiwan Univ., Taiwan) |
| Page | pp. 121 - 122 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A Full-Synthesizable High-Precision Built-In Delay Time Measurement Circuit |
| Author | Ming-Chien Tsai, *Ching-Hwa Cheng (Feng Chia Univ., Taiwan) |
| Page | pp. 123 - 124 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A Dynamic Quality-Scalable H.264 Video Encoder Chip |
| Author | *Hsiu-Cheng Chang, Yao-Chang Yang, Jia-Wei Chen (National Chung Cheng Univ., Taiwan), Ching-Lung Su (National Yunlin Univ. of Science and Tech., Taiwan), Cheng-An Chien, Jiun-In Guo, Jinn-Shyan Wang (National Chung Cheng Univ., Taiwan) |
| Page | pp. 125 - 126 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A High Performance LDPC Decoder for IEEE802.11n Standard |
| Author | *Wen Ji, Yuta Abe, Takeshi Ikenaga, Satoshi Goto (Waseda Univ., Japan) |
| Page | pp. 127 - 128 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | Design and Chip Implementation of the Ubiquitous Processor HCgorilla |
| Author | *Masa-aki Fukase, Kazunori Noda, Atsuko Yokoyama, Tomoaki Sato (Hirosaki Univ., Japan) |
| Page | pp. 129 - 130 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | An 8.69 Mvertices/s 278 Mpixels/s Tile-based 3D Graphics SoC HW/SW Development for Consumer Electronics |
| Author | *Liang-Bi Chen, Ruei-Ting Gu, Wei-Sheng Huang, Chien-Chou Wang, Wen-Chi Shiue, Tsung-Yu Ho, Yun-Nan Chang, Shen-Fu Hsiao, Chung-Nan Lee, Ing-Jer Huang (National Sun Yat-Sen Univ., Taiwan) |
| Page | pp. 131 - 132 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A Multi-Task-Oriented Security Processing Architecture with Powerful Extensibility |
| Author | *Dan Cao, Jun Han, Xiao-yang Zeng, Shi-ting Lu (Fudan Univ., China) |
| Page | pp. 133 - 134 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |
| Title | A Delay-Optimized Universal FPGA Routing Architecture |
| Author | *Fang Wu, Huowen Zhang, Lei Duan, Jinmei Lai, Yuan Wang, Jiarong Tong (Fudan Univ., China) |
| Page | pp. 135 - 136 |
| Detailed information (abstract, keywords, etc) | |
| Slides | |